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Tile Calorimeter
Mechanical Details
PMT Block
Motherboard for LV & Control Signals
HV Control & Distribution in the Drawer
Digitizer System
Readout Driver
Level 1 Trigger
Interface Board
External LV Supplies
Notes and Writeups
Software for 13bit Version of 3in1 Cards
Radiation Testing
Design Review
Production Readiness Review
Submodule Construction
Commissioning
Trigger Signals
Other Sites with TileCal Info
Other Sites with TileCal Info
Barcelona
Integrator
Integrator ADC
grounds
LV Power
Clermont-maintained site at
CERN
Illinois
PMT issues
Valencia
ROD design
Rio
LVL1 Adder
High Energy Physics
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5640 S Ellis Ave
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Chicago IL 60637
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+1-773-702-8113