UChicago ATLAS

Radiation Testing of the 3-in-1 Motherboards

The ATLAS radiation maps were used to assess the levels of ionizing radiation and neutron fluence. For the TileCal electronics the maximum doses occur at the ends of the drawers where the gap occurs between the barrel and extended barrel. The levels are ~2Gy/year (0.2 Krad/year) ionizing radiation and 10¹¹ neutrons/cm²/year (1-MeV equivalent). The ATLAS standard requires radiation testing to 10-year-equivalent doses together with a safety factor of 5. In addition, since actual exposure is at a much lower dose rate than is practical for testing, an additional factor of 5 for ionizing radiation and 1.5 for neutrons must be applied for bipolar components. Combining these factors, we test components the following levels.

	Ionizing Radiation (Krad)	Neutrons (n/cm²)
CMOS	10	5 x 10¹²
Bipolar	50	7.5 x 10¹²

It should be noted that the radiation maps were calculated without a complete specification for the drawer fingers. These are steel structures that close off the ends of the drawers. Polyethylene blocks will be inserted into the fingers to further improve the shielding for both the muon system and the TileCal electronics. In addition, most 3-in-1 cards and the active sections of the Mother Boards see significantly lower rates than the extreme values given above. Nevertheless, these conservative figures have been used in our testing.

Test Procedure

Testing to date has concentrated on the 3-in-1 cards. We have deferred testing the Mother Boards for several reasons. First, production schedules and the much larger number of 3-in-1 cards to be produced have required that we concentrate efforts there. Second, the active components on Mother Boards 2, 3, and 4 are common to the 3-in-1 cards.

Mother Boards 1 has been redesigned. Version 2.0 used a custom serial bus for system control. Version 3.0 uses ATLAS control standards; namely, the TTC (trigger timing and control) system and CANbus systems. Unfortunately, only prototype TTCrx chips are currently available. Radiation testing of Mother Boards 1 will be carried out when the production version of the TTCrx chips become available and are incorporated into the boards. Mother Board 1 is designed with a small daughter-board which contains the TTCrx chip in addition to the FPGA containing the state machine logic used for transmitting commands to the 3-in-1 cards. This allows us to make the TTCrx change without redoing the large cards. This also concentrates the high density pins of the TTCrx (ball grid array) and the Altera FPGA on a small card which is less costly to produce with mechanical high precision.

During the radiation tests the boards were under power and executed a 2 minute test procedure with a duty cycle of ~60%. In this test a variable charge was injected into the 3-in-1 card and digitized to measure the gain and linearity of the fast pulse system. For the slow integrator, the gain and linearity were measured for each of the six gain settings. During these operations the all digitial capabilities were exercised. The output of each cycle was written to disk with a time stamp so the time of any failure could be determined.

Ionizing Radiation Tests

Ionizing radiation testing has been preformed with a Co-60 source in a hot cell at Argonne National Laboratory at a dose rate of 20 Krad/hr. A series of 4 exposures were made with 3-5 cards tested in each exposure. The following discussion refers to the chip numbers from the 3-in-1 schematics.

All components shown on the schematics have successfully operated to the required doses with no failures on 5 or more cards. In the process of testing, a few components were changed to arrive at the Version 3.1 configuration. The changes are detailed below:

U5 - Earlier tests were done with an MP7533 rather than the MP7633 for reasons of availability. The former proved too radiation soft. Subsequent tests with the MP7633 fully met the requirements.
U7 - This op amp drives the precision reference voltage to the DAC and the DAC output voltages to the charge injection capacitors and the integrator circuit. The original OPA420 failed at low radiation doses. The replacement OPA4277UA operates to greater than 50Krad.
U10 - This switch package controls the gain of the integrator circuit. The original DG412DY failed at less that 10Krad. U10 now uses a DG611DY used also at U8. No failures of the DG611DY we encountered in all of the testing. It operates at greater that 50Krad ( testing to 10Krad required).
U11 - This switch package controls the connection of the reference DAC to the integrator and the integrator output to the integrator bus. The DG211DY originally used for this function had one failure at 8Krad. We have changed to the DG611DY switch.

Neutron Testing

Neutron testing was performed June 9 and 10, 1999 at the National Institute for Standards and Technology (NIST) in Gaithersburg, Maryland and followed the procedure outlined above. The neutrons at NIST are generated from a Californium source. Californium-252 is a fission source producing a distribution of neutrons with a peak at about 0.7 - 0.8 MeV. The average neutron energy is about 2.35 MeV and energetic neutrons extend up to approximately 20 MeV. This distribution is a good match to the neutron spectrum expected at the rear of the ATLAS tile calorimeter.

Six complete and fully functional cards were exposed to neutrons and executed test functions throughout the test. There were no failures of any kind. Because of the limited testing time available and the modest strength of the source, the total neutron exposures varied. Cards were tested two at a time. Two were exposed overnight and received a total dose of greater than 10¹³ n/cm². Two cards received 4.5 x 10¹² n/cm² and two received 5 x 10¹² n/cm². We conclude that the cards have satisfactory neutron tolerance.

Tile Calorimeter

Tile Calorimeter Phase I

Go to Phase II documentation

Radiation Testing of the 3-in-1 Motherboards

Test Procedure

Ionizing Radiation Tests

Neutron Testing