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Tile Calorimeter Phase I
Go to Phase II documentation
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Mechanical Details
PMT Block
Motherboard for LV & Control Signals
HV Control & Distribution in the Drawer
Digitizer System
Readout Driver
Level 1 Trigger
Interface Board
External LV Supplies
Notes and Writeups
Software for 13bit Version of 3in1 Cards
Radiation Testing
Design Review
Production Readiness Review
Submodule Construction
Commissioning
Trigger Signals
Other Sites with TileCal Info
3-in-1 Design Review
Proposed Agenda
Reference Material
Writeup
Rome LEB paper on front-end electronics
(
ps
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Mechanical drawings
3-in-1
Schematics
Drawer Cross Section
3-in-1 Board
3-in-1 Output
TDF File (v12)
3-in-1 Card Diagram
3-in-1 Output Pulse
Slow Current Integrator
Mother Board
Schematics
Artwork
Performance information
Talk at ATLAS Plenary on status of TileCal electronics (9/98)
Issues Identified