• Pulsar hardware design considerations (not yet done)

• Pulsar schematics (with description)

• Pulsar Layout (board fabrication and assembly), Parts List and Reference, trace Analysis results etc (This part is documented by Mircea).

Note that trace analysis is in progress... and first round trace analysis results indicate that there are a few signals need to be improved (add termination etc). what's shown here are the results from the first round. this is work in progress...this will take some time.

• Pulsar FPGA design Archive (a.k.a "firmare" in HEP community) (in progress)

• Plans for Pulsar Board Level simulation, Pulsar plus mezzanine cards multi-board level simulation (in progress)

• Pulsar Board Level simulation results done by Sakari (supervised by TL) ( this is work in progress, more results will be available.)