Pulsar as a general purpose test board for Level 2 trigger

Pulsar is designed to be a general purpose test tool for the existing CDF Level 2 trigger system. It can be a data source for all data inputs to Level 2 decision crate, and it can be a data sink for all Level 2 data paths as well. In this sense, "PULSAR" stands for "PULSer And Recorder". In the recorder mode, the data can be made available via VME access (or directly into a standalone PC). With a GLINK mezzanine card, Pulsar can also source data for and sink input data to the Silicon Vertex Trigger (SVT) system (fiber data from SVX to Hit-Finder boards). With the mezzanine card approach, it is posible to use Pulsar to sink (or spy) other types of data and make them available for online monitoring for CDF DAQ system. Just like SVT boards, Pulsar can also drive and receive some of the P2 user-defined lines to allow inter-communications among Pulsar boards. In fact, it is designed the same way as SVT boards so that Pulsar can communicate with SVT boards as well (for details on how SVT boards use these lines, see Spy Control specification ).

The primary usage of the Pulsar board is, of course, as a test stand tool for Level 2 system. The goal is to make sure CDF will have a robust Level 2 trigger with great performance well into Run2b. More detailed description will be provided soon, for now, some initial discussions about this can be found in:

• Recent talk on Pulsar as a teststand tool for Level 2 trigger system

Pulsar as a Pulser for all Level 2 trigger data paths

• As a pulser for Level 2 trigger data path, the basic requirement is quite simple. However, as each subsystem data path was implemented differently, an universal design is not easy and requires careful thinking. From hardware point of view, the differences can be absorbed into Pulsar design. For example, for the optical paths, one can absorb the difference between Muon (pure hotlink optical) and CLIST(hotlink optical plus LVDS cable) into one type of mezzanine cards (Tx and Rx). In the Muon data path case (only one mezzanine card is shown), one DataIO FPGA will drive two mezzanine cards each with 4 fiber channels. In CLIST case, one DataIO FPGA will drive one mezzanine card with 4 fiber channels and another mezzanine card with 2 fiber channels plus one LVDS cable. The PCB design for the mezzanine card will be the same, but different components will be mounted for the CLIST LVDS case. For each DataIO FPGA, there is one external SRAM attached to it. The SRAM will be used to allow user to download large number of events.

  The firmware design needs careful thinking. Peter Wittich is currently working on the firmware design (and VHDL coding) for the pulser case, more details will be provided later (will appear at firmware design section).

Pulsar as a Recorder for all Level 2 trigger data paths

Although the idea to record the upstream data and readout via VME is very simple, there are a few issues also need careful thinking for the firmware design. More details will be provided later (will appear at firmware design section).

As mentioned earlier, with a few minor modifications to the Pulsar baseline design, Pulsar can also record the data directly into a PC via high bandwidth commercially available SLINK to PCI/PMC interface cards . This could be potentially very useful to directly "spy" on the data. The core firmware in this mode is written and has been used for board level simulation ever since April. This is a more advanced feature and can be used at a later stage(see Pulsar as a general purpose tool).

Useful Links (work in progress)

• Links (in progress)