Simple test firmware was created to do simple tests to the Pulsar board. The firmware is almost identical for all of the three FPGAs. Only Control FPGA is missing the SRAM test part.
All of the testing is done using VME interface.
VME address map for the simple test firmware.
Functionality and simulation results
Read only register
The first simple test will test the VME interface. In every FPGA there is a read only register. This register has a 32-bit hex value "deadbeef". It is read with a VME read access.Notes
QuickSim simulation results
QuickSim scripts
LEDs
All of the FPGAs have three LEDs. This simple test sets these LEDs ON and OFF.Notes
QuickSim simulation results
QuickSim scripts
Pulser
In this test a pulse is send out on one of the debug lines (Debug(0) in case of the DataIO FPGAs, and DebugA(0) in case of the Control FPGA).Notes
QuickSim simulation results
QuickSim scripts
Test register
In this test two 32-bit values are written in to a test register and read back from it.Notes
QuickSim simulation results
QuickSim scripts
Internal RAM
In this test two 36-bit values are written into a 36-bit wide internal RAM and read back from it.Notes
QuickSim simulation results
QuickSim scripts
External SRAM
In this test four 36-bit values are written into an external SRAM and read back from it. This test was not done for the Control FPGA, because it doesn't have SRAM.Notes
QuickSim simulation results
QuickSim scripts
