Html last updated 2015-07-23 05:16:40.412572



I1_RxLDC

Compile Started Compile Time Processor AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Fitter Effort
2015-07-22 08:20:24 1:01:03 b439e88 ac61546 1D 17DF 6536 419 0 122.2 MHz/100.0 MHz 165.23 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150722_092127 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,739 / 158,500 ( 19 % )
Total registers 46708
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit b439e8835177977521221e21ce172b4ab3a86bb0
Author: U-ELECSHOP\ftk
Date: Wed Jul 22 08:19:50 2015 -0700

  don't remove


commit daa625d42abe0f36430bf4e36e9dda6bf08094e2
Author: U-ELECSHOP\ftk
Date: Wed Jul 22 07:06:57 2015 -0700

  on this windows bash wants y:

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-22 04:51:05 1:08:27 69a9712 ac61546 1D 17DB 6537 419 0 136.28 MHz/100.0 MHz 158.6 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150722_055932 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,781 / 158,500 ( 19 % )
Total registers 46698
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 69a971229213c0c876d00c0cd2a23bfede03e1ff
Author: U-ELECSHOP\ftk
Date: Wed Jul 22 03:15:41 2015 -0700

  struggle to get the copies to work


commit 5831ed174d754f58a564a5e4cfb2701f480a4a74
Author: U-ELECSHOP\ftk
Date: Mon Jul 20 07:52:16 2015 -0700

  moving instead of copying

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-21 22:00:09 1:04:25 5831ed1 ac61546 1D 17D5 6537 419 0 136.59 MHz/100.0 MHz 159.77 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150721_230434 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,689 / 158,500 ( 19 % )
Total registers 46691
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 5831ed174d754f58a564a5e4cfb2701f480a4a74
Author: U-ELECSHOP\ftk
Date: Mon Jul 20 07:52:16 2015 -0700

  moving instead of copying


commit edf51d9120be5591cf64c35abaa65070d96e693d
Author: Jamie Saxon
Date: Fri Jul 17 12:51:32 2015 +0200

  compile versioning

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-21 08:29:41 1:04:06 5831ed1 ac61546 1D 17C7 6536 419 0 122.74 MHz/100.0 MHz 161.37 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150721_093347 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,724 / 158,500 ( 19 % )
Total registers 46772
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 5831ed174d754f58a564a5e4cfb2701f480a4a74
Author: U-ELECSHOP\ftk
Date: Mon Jul 20 07:52:16 2015 -0700

  moving instead of copying


commit edf51d9120be5591cf64c35abaa65070d96e693d
Author: Jamie Saxon
Date: Fri Jul 17 12:51:32 2015 +0200

  compile versioning

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-20 07:52:25 1:04:21 5831ed1 ac61546 1D 17AE 6536 419 0 132.15 MHz/100.0 MHz 164.37 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150720_085646 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,710 / 158,500 ( 19 % )
Total registers 46746
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 5831ed174d754f58a564a5e4cfb2701f480a4a74
Author: U-ELECSHOP\ftk
Date: Mon Jul 20 07:52:16 2015 -0700

  moving instead of copying


commit edf51d9120be5591cf64c35abaa65070d96e693d
Author: Jamie Saxon
Date: Fri Jul 17 12:51:32 2015 +0200

  compile versioning

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-20 04:54:33 1:05:35 edf51d9 ac61546 1D 17AB 6536 419 0 135.06 MHz/100.0 MHz 161.66 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150720_060008 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,679 / 158,500 ( 19 % )
Total registers 46741
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit edf51d9120be5591cf64c35abaa65070d96e693d
Author: Jamie Saxon
Date: Fri Jul 17 12:51:32 2015 +0200

  compile versioning


commit 13352d3824acbd682ed8e151b1405419331eb69c
Author: U-ELECSHOP\ftk
Date: Thu Jul 16 11:25:10 2015 -0700

  fixing compile.sh for ftk account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-17 05:53:13 1:00:03 edf51d9 ac61546 1D 1764 6538 419 0 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150717_065316 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,746 / 158,500 ( 19 % )
Total registers 46706
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit edf51d9120be5591cf64c35abaa65070d96e693d
Author: Jamie Saxon
Date: Fri Jul 17 12:51:32 2015 +0200

  compile versioning


commit 13352d3824acbd682ed8e151b1405419331eb69c
Author: U-ELECSHOP\ftk
Date: Thu Jul 16 11:25:10 2015 -0700

  fixing compile.sh for ftk account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-15 22:00:09 0:58:39 175d04d ac61546 1D 01 0E 6536 419 0 139.47 MHz/100.0 MHz 162.28 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150715_225848 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,739 / 158,500 ( 19 % )
Total registers 46646
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 175d04dd35d97bed6cbd8e4e6fe31bd7748a9e75
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 15:25:30 2015 -0700

  changes for ftk account


commit 5024102ab870390449d93e54bf70985f9561a0db
Author: Jamie Saxon
Date: Wed Jul 8 03:23:21 2015 -0700

  compile script: point to right log

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-15 10:48:14 1:12:18 175d04d ac61546 1D 01 0E 6536 419 0 139.47 MHz/100.0 MHz 162.28 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150715_120032 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,739 / 158,500 ( 19 % )
Total registers 46646
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 175d04dd35d97bed6cbd8e4e6fe31bd7748a9e75
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 15:25:30 2015 -0700

  changes for ftk account


commit 5024102ab870390449d93e54bf70985f9561a0db
Author: Jamie Saxon
Date: Wed Jul 8 03:23:21 2015 -0700

  compile script: point to right log

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-15 04:00:40 1:14:01 175d04d ac61546 1D 01 0E 6530 421 0 139.47 MHz/100.0 MHz 162.28 MHz/160.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I1_RxLDC_20150715_051441 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 29,739 / 158,500 ( 19 % )
Total registers 46646
Total pins 189 / 656 ( 29 % )
Total virtual pins 0
Total block memory bits 10,084,592 / 21,032,960 ( 48 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 4 / 24 ( 17 % )
Total HSSI PMA RX Deserializers 4 / 24 ( 17 % )
Total HSSI TX PCSs 20 / 24 ( 83 % )
Total HSSI TX Channels 20 / 24 ( 83 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 175d04dd35d97bed6cbd8e4e6fe31bd7748a9e75
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 15:25:30 2015 -0700

  changes for ftk account


commit 5024102ab870390449d93e54bf70985f9561a0db
Author: Jamie Saxon
Date: Wed Jul 8 03:23:21 2015 -0700

  compile script: point to right log

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.



I2_RxLDC

Compile Started Compile Time Processor AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Fitter Effort
2015-07-22 12:40:30 0:01:43 f7904c1 ac61546 N/A 1261 29 1 - - -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I2_RxLDC_20150722_124213 .

Leading Errors

Error (213009): File name "I2_RxLDC.pof" does not exist

Processor Git Logs


commit f7904c190fa21afdf732cc9338ad8f2e842a3375
Author: U-ELECSHOP\ftk
Date: Wed Jul 22 12:40:03 2015 -0700

  changing how we copy the compiles


commit 03632bc46e76a6f6437b20cd9230ecd3aa82dfbb
Author: U-ELECSHOP\ftk
Date: Wed Jul 22 07:33:05 2015 -0700

  compile.sh to use y:

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-15 20:00:10 1:19:55 06ecf47 ac61546 2D 01 10 6238 643 0 120.15 MHz/100.0 MHz 160.26 MHz/160.0 MHz -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I2_RxLDC_20150715_212005 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 38,871 / 158,500 ( 25 % )
Total registers 78870
Total pins 182 / 656 ( 28 % )
Total virtual pins 0
Total block memory bits 6,816,340 / 21,032,960 ( 32 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 9 / 24 ( 38 % )
Total HSSI PMA RX Deserializers 9 / 24 ( 38 % )
Total HSSI TX PCSs 17 / 24 ( 71 % )
Total HSSI TX Channels 17 / 24 ( 71 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 06ecf47ca8dda351d505589db3f143e2c4d28248
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:51:25 2015 -0700

  fixing for ftk account


commit e0ef02e5445be7e3491114292e50be83fa516f4f
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:32:15 2015 -0700

  fixing compile scripts for new account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-15 01:44:01 1:20:24 06ecf47 ac61546 2D 01 10 6238 643 0 120.15 MHz/100.0 MHz 160.26 MHz/160.0 MHz -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I2_RxLDC_20150715_030425 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 38,871 / 158,500 ( 25 % )
Total registers 78870
Total pins 182 / 656 ( 28 % )
Total virtual pins 0
Total block memory bits 6,816,340 / 21,032,960 ( 32 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 9 / 24 ( 38 % )
Total HSSI PMA RX Deserializers 9 / 24 ( 38 % )
Total HSSI TX PCSs 17 / 24 ( 71 % )
Total HSSI TX Channels 17 / 24 ( 71 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 06ecf47ca8dda351d505589db3f143e2c4d28248
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:51:25 2015 -0700

  fixing for ftk account


commit e0ef02e5445be7e3491114292e50be83fa516f4f
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:32:15 2015 -0700

  fixing compile scripts for new account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-14 20:00:07 1:16:39 06ecf47 ac61546 2D 01 10 6238 643 0 120.15 MHz/100.0 MHz 160.26 MHz/160.0 MHz -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I2_RxLDC_20150714_211646 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 38,871 / 158,500 ( 25 % )
Total registers 78870
Total pins 182 / 656 ( 28 % )
Total virtual pins 0
Total block memory bits 6,816,340 / 21,032,960 ( 32 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 9 / 24 ( 38 % )
Total HSSI PMA RX Deserializers 9 / 24 ( 38 % )
Total HSSI TX PCSs 17 / 24 ( 71 % )
Total HSSI TX Channels 17 / 24 ( 71 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 06ecf47ca8dda351d505589db3f143e2c4d28248
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:51:25 2015 -0700

  fixing for ftk account


commit e0ef02e5445be7e3491114292e50be83fa516f4f
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:32:15 2015 -0700

  fixing compile scripts for new account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-14 15:06:20 1:18:13 06ecf47 ac61546 2D 01 10 6238 643 0 120.15 MHz/100.0 MHz 160.26 MHz/160.0 MHz -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I2_RxLDC_20150714_162433 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB5H4F35C4
Timing Models Final
Logic utilization (in ALMs) 38,871 / 158,500 ( 25 % )
Total registers 78870
Total pins 182 / 656 ( 28 % )
Total virtual pins 0
Total block memory bits 6,816,340 / 21,032,960 ( 32 % )
Total DSP Blocks 0 / 1,092 ( 0 % )
Total HSSI RX PCSs 9 / 24 ( 38 % )
Total HSSI PMA RX Deserializers 9 / 24 ( 38 % )
Total HSSI TX PCSs 17 / 24 ( 71 % )
Total HSSI TX Channels 17 / 24 ( 71 % )
Total PLLs 1 / 40 ( 3 % )
Total DLLs 0 / 4 ( 0 % )

Processor Git Logs


commit 06ecf47ca8dda351d505589db3f143e2c4d28248
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:51:25 2015 -0700

  fixing for ftk account


commit e0ef02e5445be7e3491114292e50be83fa516f4f
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:32:15 2015 -0700

  fixing compile scripts for new account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-14 14:51:38 0:05:04 06ecf47 ac61546 N/A 3019 89 4 - - -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_I2_RxLDC_20150714_145642 .

Leading Errors

Error (12006): Node instance "mgl_prim2" instantiates undefined entity "sld_reserved_Rx_LatencyCalc_2_8be" File: D:/Projects/ftk/Nightlies/Input2/RxLDC/db/sld_ela_trigger_3do.tdf Line: 48
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 89 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "I2_RxLDC.pof" does not exist

Processor Git Logs


commit 06ecf47ca8dda351d505589db3f143e2c4d28248
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:51:25 2015 -0700

  fixing for ftk account


commit e0ef02e5445be7e3491114292e50be83fa516f4f
Author: U-ELECSHOP\ftk
Date: Tue Jul 14 14:32:15 2015 -0700

  fixing compile scripts for new account

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.



RxDebug_EMIF_master

Compile Started Compile Time Processor AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Fitter Effort
2015-07-12 16:00:37 1:22:52 393e4d0 ac61546 FE 01 0E 27910 323 0 135.89 MHz/100.0 MHz 147.71 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150712_172329 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,993 / 190,240 ( 29 % )
Total registers 87490
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.210 DOEMIF:gen_singl...afi_address_r[9]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[9] DOEMIF:gen_singl...io_outa[9]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[9]~DFFLO
2 -0.206 DOEMIF:gen_singl...afi_address_r[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[3] DOEMIF:gen_singl...io_outa[3]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[3]~DFFLO
3 -0.146 DOEMIF:gen_singl...ess|datain_r[37]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|EMIFRLDRAMII_p0_fr_cycle_shifter:uaddr_cmd_shift_address|datain_r[37] DOEMIF:gen_singl..._outa[18]~DFFHI0DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[18]~DFFHI0
4 -0.124 DOEMIF:gen_singl...ess|datain_r[28]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|EMIFRLDRAMII_p0_fr_cycle_shifter:uaddr_cmd_shift_address|datain_r[28] DOEMIF:gen_singl...o_outa[9]~DFFHI0DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[9]~DFFHI0
5 -0.121 DOEMIF:gen_singl...afi_address_r[8]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[8] DOEMIF:gen_singl...io_outa[8]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[8]~DFFLO

Processor Git Logs


commit 393e4d0ad77aa7ef1b5c0035b765afb97c185582
Author: Karol Krizka
Date: Thu Jul 9 22:04:12 2015 +0200

  Hold control registers consolidation.


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-11 16:00:25 1:23:11 393e4d0 ac61546 FE 01 0E 27910 323 0 135.89 MHz/100.0 MHz 147.71 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150711_172336 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,993 / 190,240 ( 29 % )
Total registers 87490
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.210 DOEMIF:gen_singl...afi_address_r[9]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[9] DOEMIF:gen_singl...io_outa[9]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[9]~DFFLO
2 -0.206 DOEMIF:gen_singl...afi_address_r[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[3] DOEMIF:gen_singl...io_outa[3]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[3]~DFFLO
3 -0.146 DOEMIF:gen_singl...ess|datain_r[37]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|EMIFRLDRAMII_p0_fr_cycle_shifter:uaddr_cmd_shift_address|datain_r[37] DOEMIF:gen_singl..._outa[18]~DFFHI0DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[18]~DFFHI0
4 -0.124 DOEMIF:gen_singl...ess|datain_r[28]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|EMIFRLDRAMII_p0_fr_cycle_shifter:uaddr_cmd_shift_address|datain_r[28] DOEMIF:gen_singl...o_outa[9]~DFFHI0DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[9]~DFFHI0
5 -0.121 DOEMIF:gen_singl...afi_address_r[8]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[8] DOEMIF:gen_singl...io_outa[8]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[8]~DFFLO

Processor Git Logs


commit 393e4d0ad77aa7ef1b5c0035b765afb97c185582
Author: Karol Krizka
Date: Thu Jul 9 22:04:12 2015 +0200

  Hold control registers consolidation.


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-10 16:03:36 1:26:04 393e4d0 ac61546 FE 01 0E 27910 323 0 135.89 MHz/100.0 MHz 147.71 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150710_172940 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,993 / 190,240 ( 29 % )
Total registers 87490
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.210 DOEMIF:gen_singl...afi_address_r[9]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[9] DOEMIF:gen_singl...io_outa[9]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[9]~DFFLO
2 -0.206 DOEMIF:gen_singl...afi_address_r[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[3] DOEMIF:gen_singl...io_outa[3]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[3]~DFFLO
3 -0.146 DOEMIF:gen_singl...ess|datain_r[37]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|EMIFRLDRAMII_p0_fr_cycle_shifter:uaddr_cmd_shift_address|datain_r[37] DOEMIF:gen_singl..._outa[18]~DFFHI0DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[18]~DFFHI0
4 -0.124 DOEMIF:gen_singl...ess|datain_r[28]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|EMIFRLDRAMII_p0_fr_cycle_shifter:uaddr_cmd_shift_address|datain_r[28] DOEMIF:gen_singl...o_outa[9]~DFFHI0DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[9]~DFFHI0
5 -0.121 DOEMIF:gen_singl...afi_address_r[8]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_addr_cmd_datapath:uaddr_cmd_datapath|afi_address_r[8] DOEMIF:gen_singl...io_outa[8]~DFFLODOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_p0:p0|EMIFRLDRAMII_p0_memphy:umemphy|EMIFRLDRAMII_p0_new_io_pads:uio_pads|EMIFRLDRAMII_p0_addr_cmd_pads:uaddr_cmd_pads|altddio_out:uaddress_pad|ddio_out_r3f:auto_generated|ddio_outa[8]~DFFLO

Processor Git Logs


commit 393e4d0ad77aa7ef1b5c0035b765afb97c185582
Author: Karol Krizka
Date: Thu Jul 9 22:04:12 2015 +0200

  Hold control registers consolidation.


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-08 16:00:31 1:23:37 393826d ac61546 FE 01 0E 27908 317 0 142.39 MHz/100.0 MHz 147.28 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150708_172408 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,846 / 190,240 ( 29 % )
Total registers 87440
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[11]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[11]
2 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
3 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[17]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[17]
4 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[19]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[19]
5 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[21]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[21]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-07 16:03:23 1:28:23 393826d ac61546 FE 01 0E 27908 317 0 142.39 MHz/100.0 MHz 147.28 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150707_173146 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,846 / 190,240 ( 29 % )
Total registers 87440
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[11]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[11]
2 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
3 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[17]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[17]
4 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[19]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[19]
5 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[21]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[21]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-06 16:00:21 1:24:11 393826d ac61546 FE 01 0E 27908 317 0 142.39 MHz/100.0 MHz 147.28 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150706_172432 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,846 / 190,240 ( 29 % )
Total registers 87440
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[11]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[11]
2 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
3 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[17]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[17]
4 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[19]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[19]
5 -0.379 DOEMIF:gen_singl...clk|reset_reg[3]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_reset_sync:ureset_afi_clk|reset_reg[3] DOEMIF:gen_singl...if|cmd1_addr[21]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[21]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-05 16:00:23 1:20:41 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150705_172104 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-04 16:00:40 1:20:34 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150704_172114 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-03 16:00:48 1:20:51 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150703_172139 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-02 16:00:23 1:20:44 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150702_172107 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-01 16:00:27 1:20:09 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150701_172036 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-30 16:00:57 1:20:09 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150630_172106 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-29 16:00:21 1:20:13 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150629_172034 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-28 16:00:35 1:19:55 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150628_172030 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-27 16:00:36 1:20:42 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150627_172118 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-26 16:00:23 1:19:28 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150626_171951 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-25 16:00:21 1:21:17 393826d 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150625_172138 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-24 16:00:25 1:20:17 a2c66eb 5e26926 FE 01 0E 27908 317 0 139.1 MHz/100.0 MHz 150.94 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150624_172042 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,946 / 190,240 ( 29 % )
Total registers 87592
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.199 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
2 -0.192 DOEMIF:gen_singl...f|cmd0_write_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_write_req DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
3 -0.181 DOEMIF:gen_singl...|phy_cal_successDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_success DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL
4 -0.139 DOEMIF:gen_singl..._one:fsm|do_readDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|alt_rld_fsm_ctl_bl_is_one:fsm|do_read DOEMIF:gen_singl...if|cmd1_addr[15]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[15]
5 -0.138 DOEMIF:gen_singl...nst|phy_cal_failDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|sequencer_phy_mgr:sequencer_phy_mgr_inst|phy_cal_fail DOEMIF:gen_singl..._B_ADDRESS_STALLDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|ExtMemClockInterface:ExternalMemInterface|dcfifo:dcfifo_input_amc_inst|dcfifo_lgm1:auto_generated|altsyncram_bf71:fifo_ram|ram_block5a120~PORT_B_ADDRESS_STALL

Processor Git Logs


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout


commit a374e80c2a4f22206946de3087c873c5f52f4215
Author: Jordan Webster
Date: Wed Jun 24 10:49:45 2015 -0700

  trying to fix compile fails from disconnected line in DOSpyBuffers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-23 16:00:27 1:20:48 b0ea31e 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150623_172115 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-22 16:00:21 1:21:00 b0ea31e 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150622_172121 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-21 16:00:36 1:20:08 b0ea31e 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150621_172044 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-20 16:00:24 1:19:19 5975ae1 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150620_171943 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 5975ae14e045d34856d22389db903b59bd074f49
Author: John Alison
Date: Sat Jun 20 22:19:59 2015 +0200

  More Duplications


commit 74f9648de8673baa0048564d2c4ec9cb692e53e4
Author: jwebste2
Date: Fri Jun 19 16:05:55 2015 -0500

  updated nightly compile script

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-19 16:00:43 1:19:34 d77dd03 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150619_172017 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit d77dd035e78d6ac25c3284a702c96cc9af48c4b3
Author: jwebste2
Date: Fri Jun 19 11:33:48 2015 -0500

  updated nightly scripts


commit da78928e3fda69bf54b073a456a9c6e772b73042
Author: jwebste2
Date: Fri Jun 19 10:58:59 2015 -0500

  new nightly script

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-18 16:00:31 1:19:20 771ba18 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150618_171951 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 771ba18f6632802ff5785640080c93d1940f0952
Author: jwebster
Date: Thu Jun 18 12:23:08 2015 -0500

  nightly compile scripts


commit ae7993cf22664900fc7bdd42478db9eae038b315
Author: jwebster
Date: Thu Jun 18 12:19:20 2015 -0500

  typo in nightly script

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-17 16:00:11 1:18:38 251ae51 5e26926 FE 01 0E 27906 318 0 134.35 MHz/100.0 MHz 149.57 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150617_171849 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,925 / 190,240 ( 29 % )
Total registers 87451
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 251ae51b9e8c16cca3383d84ca59aa952127bbff
Merge: 137fa0b c6a09d2
Author: Jordan Webster
Date: Tue Jun 16 16:34:31 2015 -0700

  Merge branch 'Jordan'


commit c6a09d24a35da4fbb37382514d5ba57cf7b94777
Author: Jordan Webster
Date: Tue Jun 16 16:17:45 2015 -0700

  updated waves for TF road record types

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-16 16:01:01 1:24:17 b46aad1 5e26926 FE 01 0E 27906 318 0 136.78 MHz/100.0 MHz 152.53 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150616_172518 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,945 / 190,240 ( 29 % )
Total registers 87454
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,772,452 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b46aad18d007b14c924aa2e781755471092c48a5
Merge: 81e9937 09d66c1
Author: unknown
Date: Tue Jun 16 15:20:32 2015 -0700

  Merge remote-tracking branch 'origin/master'

  Conflicts:
  combined_testbench/run_MergedDOLoop.do


commit 81e9937305472905c90ddce4df66b9877fcb4272
Author: unknown
Date: Tue Jun 16 15:19:36 2015 -0700

  adding DCIndexROM.vhd to rx emif qsf

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-15 16:00:45 1:23:33 b14f0e8 8a74633 FE 01 0C 27849 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150615_172418 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit b14f0e8d7ffe11a233bc97fea5a5954a39d99ee5
Author: John Alison
Date: Sun Jun 14 15:11:22 2015 +0200

  Updates to the latency to match the chi2


commit 0313f9ef396c612f0e88d34aa4ca66b4439812a7
Author: John Alison
Date: Sun Jun 14 14:40:46 2015 +0200

  Add fanout

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-14 16:00:41 1:23:35 b14f0e8 8a74633 FE 01 0C 27849 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150614_172416 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit b14f0e8d7ffe11a233bc97fea5a5954a39d99ee5
Author: John Alison
Date: Sun Jun 14 15:11:22 2015 +0200

  Updates to the latency to match the chi2


commit 0313f9ef396c612f0e88d34aa4ca66b4439812a7
Author: John Alison
Date: Sun Jun 14 14:40:46 2015 +0200

  Add fanout

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-13 16:00:23 1:23:31 c5178a2 8a74633 FE 01 0C 27849 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150613_172354 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit c5178a29264f669246ec94237617d390f4fb7534
Author: John Alison
Date: Sat Jun 13 04:25:56 2015 -0400

  Bring in changes from pushing timing


commit f5a890edb8cb9e307dfe5d05ecbc6ce981296420
Author: John Alison
Date: Sat Jun 13 04:18:13 2015 -0400

  Valdated Sim

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-12 16:00:12 1:23:44 3451fb6 8a74633 FE 01 0C 27849 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150612_172356 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 3451fb662aa8738c2d9d1117509eaf7cc017d3a0
Merge: bbb0304 210641e
Author: John Alison
Date: Fri Jun 12 08:04:58 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 210641e0744c83d23ae9b78dca223dfe75bc6cc3
Author: Karol Krizka
Date: Fri Jun 12 14:03:16 2015 +0200

  Adjusted TFNomFitter delays to componstate for registering everything.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-11 16:02:21 1:30:01 94e6851 8a74633 FE 01 0C 27849 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150611_173222 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 94e68519ec9e7986d2bf0a608cff6f74f9afa2db
Merge: 93f3ae2 414f714
Author: jwebster
Date: Thu Jun 11 11:49:52 2015 -0500

  Merge branch 'master' of Y:\FTK\Processor_1_20141030


commit 414f714ab9f30dc915a4320b681432b779f4b101
Author: Karol Krizka
Date: Thu Jun 11 11:14:02 2015 +0200

  Delay output layermaps in TFNomFitter to make them synchronous with chi2 output.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-10 16:03:05 1:25:47 52f1a1c 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150610_172852 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 52f1a1c793f4f258dd78d7cc3264fa90c97805f4
Author: Karol Krizka
Date: Wed Jun 10 11:20:47 2015 +0200

  Updates to TF loading in run_MergedDOLoop.


commit 5f6a79c03471b4d0b9935dd999d66c8536141369
Author: Karol Krizka
Date: Wed Jun 10 11:18:20 2015 +0200

  Updates to TF waves files in combined_testbench.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-09 16:00:33 1:24:19 983c302 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150609_172452 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 983c302a638342a01a7c8891b1920ce4fcea1149
Author: Karol Krizka
Date: Tue Jun 9 11:43:25 2015 +0200

  Fixed typo in TFRoadSynchronizer to get it to compile.


commit c80b123e480c7e57594429e23530bee0addae55e
Author: Karol Krizka
Date: Tue Jun 9 11:33:08 2015 +0200

  Fixed roads with ID 0 comming out of buffer logic.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-08 16:00:31 1:24:52 955880d 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150608_172523 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-07 16:00:38 1:24:21 955880d 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150607_172459 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-06 16:00:33 1:24:48 955880d 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150606_172521 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-05 16:00:37 1:24:49 955880d 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150605_172526 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-04 16:00:09 1:28:11 955880d 8a74633 FE 01 0C 27846 313 0 133.64 MHz/100.0 MHz 151.03 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150604_172820 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 55,493 / 190,240 ( 29 % )
Total registers 88019
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,636 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[10]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[10]
2 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[12]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[12]
3 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[13]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[13]
4 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[14]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[14]
5 -0.233 DOEMIF:gen_singl...if|cmd0_read_reqDOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd0_read_req DOEMIF:gen_singl...if|cmd1_addr[16]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|alt_rld_controller_top_ctl_bl_is_one_urfsh:c0|alt_rld_controller_ctl_bl_is_one_urfsh:controller_inst|memctl_data_if_ctl_bl_is_one_rldramii:data_if|cmd1_addr[16]

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-03 16:00:20 1:11:47 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150603_171207 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-02 16:00:52 1:11:43 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150602_171235 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-01 16:00:09 1:11:42 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150601_171151 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-31 16:00:21 1:11:46 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150531_171207 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-30 16:00:20 1:12:10 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150530_171230 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-28 16:00:41 1:12:09 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150528_171250 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-27 16:00:09 1:12:39 e899ea5 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150527_171248 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-26 16:00:48 1:12:25 f0bca2d 8a74633 FE 01 0C 27192 209 0 131.25 MHz/100.0 MHz 155.45 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150526_171313 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,216 / 190,240 ( 28 % )
Total registers 82066
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit f0bca2ddc048fa28dc073b02af1252fb60bc3b25
Author: unknown
Date: Tue May 26 15:38:23 2015 -0700

  fixed debug projects to pull header and trailer from DF scynch so it doesnt exert back pressure


commit f7fb5f7588540d28912ba2c3150f18f0bab8bd85
Author: John Alison
Date: Tue May 26 10:52:16 2015 -0400

  pipe_lining read_ready to TF

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-25 16:00:09 1:10:48 2cc96cd caea3fb FE 01 0A 27192 196 0 140.94 MHz/100.0 MHz 152.28 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150525_171057 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 53,848 / 190,240 ( 28 % )
Total registers 80449
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 2cc96cde8a5f922073369b789173663351425956
Merge: 098d4ed 1dd5d2c
Author: unknown
Date: Mon May 25 13:17:30 2015 -0700

  Merge remote-tracking branch 'origin/master'


commit 098d4edd67819277b12e3f2a37cb29b1e00ffc96
Author: unknown
Date: Mon May 25 13:17:08 2015 -0700

  adding monitoring of emif calibration success flag. DO_Status[22]

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-24 16:00:26 1:10:05 df20913 caea3fb FE 01 07 27186 190 0 139.84 MHz/100.0 MHz 148.7 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150524_171031 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 53,855 / 190,240 ( 28 % )
Total registers 80388
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit df209137fc23835ad7980541ad18539681003c2f
Author: John Alison
Date: Sat May 23 15:32:14 2015 -0400

  Bug fixing'


commit b837d788aaec7dd2e830ef853da8799dd8bad9d8
Author: John Alison
Date: Sat May 23 14:28:23 2015 -0400

  Updating types for reg duplication

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-23 16:00:19 1:10:27 df20913 caea3fb FE 01 07 27186 190 0 139.84 MHz/100.0 MHz 148.7 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150523_171046 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 53,855 / 190,240 ( 28 % )
Total registers 80388
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit df209137fc23835ad7980541ad18539681003c2f
Author: John Alison
Date: Sat May 23 15:32:14 2015 -0400

  Bug fixing'


commit b837d788aaec7dd2e830ef853da8799dd8bad9d8
Author: John Alison
Date: Sat May 23 14:28:23 2015 -0400

  Updating types for reg duplication

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-22 16:00:03 1:11:27 eef1e2e caea3fb FE 01 07 27186 190 0 134.12 MHz/100.0 MHz 145.12 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150522_171130 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 53,876 / 190,240 ( 28 % )
Total registers 80338
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit eef1e2e278e696145fe58e20947561d926805088
Author: John Alison
Date: Fri May 22 15:32:10 2015 -0400

  Adding pipelinning to TFRoadSynchron


commit 98445b4ec88ff8e83de28eacc8b8a9705c0fc399
Author: John Alison
Date: Fri May 22 15:29:58 2015 -0400

  Adding pipelining before the TFInputFIFO

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-21 16:00:03 0:01:03 b5e1460 caea3fb N/A 1734 0 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150521_160106 .

Leading Errors

Error (10482): VHDL error at TFNomCombiner.vhdl(458): object "sr_consts" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFNomCombiner.vhdl Line: 458
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 24 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_EMIF.pof" does not exist

Processor Git Logs


commit b5e14609780d9ff662addc8355d98a50dc5aec91
Author: John Alison
Date: Thu May 21 16:33:54 2015 -0400

  Adding more duplicate registers


commit 4356afec629904b4a81d953600c1abf054aa1444
Author: John Alison
Date: Thu May 21 12:03:55 2015 -0400

  Duplicating the const req

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-20 16:00:02 0:01:04 151d62e caea3fb N/A 1734 0 14 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150520_160106 .

Leading Errors

Error (10482): VHDL error at Rx.vhd(1122): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1122
Error (10482): VHDL error at Rx.vhd(1128): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1128
Error (10482): VHDL error at Rx.vhd(1134): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1134
Error (10482): VHDL error at Rx.vhd(1140): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1140
Error (10482): VHDL error at Rx.vhd(1146): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1146
Error (10482): VHDL error at Rx.vhd(1152): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1152
Error (10482): VHDL error at Rx.vhd(1158): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1158
Error (10482): VHDL error at Rx.vhd(1163): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1163
Error (10482): VHDL error at Rx.vhd(1168): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1168
Error (10482): VHDL error at Rx.vhd(1173): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1173
Error (10482): VHDL error at Rx.vhd(1178): object "do_send_input_event" is used but not declared File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1178
...

Processor Git Logs


commit 151d62e815d48241e8e54ad9cd62973678c9defc
Merge: 55fd268 89a43d0
Author: jwebster
Date: Wed May 20 14:27:29 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 89a43d0ad108663b1ef72847857a26bd714c277e
Merge: 0896203 0f8b1c6
Author: John Alison
Date: Wed May 20 12:41:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-19 16:00:34 0:01:12 1e2affd caea3fb N/A 1734 0 16 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150519_160146 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1334): formal "pix_stream_req" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1334
Error (10346): VHDL error at Rx.vhd(1301): formal port or parameter "soft_reset_n" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1301
Error (10784): HDL error at DOEMIF.vhd(86): see declaration for object "soft_reset_n" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 86
Error (10346): VHDL error at Rx.vhd(1301): formal port or parameter "global_reset_n" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1301
Error (10784): HDL error at DOEMIF.vhd(87): see declaration for object "global_reset_n" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 87
Error (10346): VHDL error at Rx.vhd(1301): formal port or parameter "oct_rzqin" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1301
Error (10784): HDL error at DOEMIF.vhd(88): see declaration for object "oct_rzqin" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 88
Error (10346): VHDL error at Rx.vhd(1301): formal port or parameter "extmem_pll_refclk" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1301
Error (10784): HDL error at DOEMIF.vhd(89): see declaration for object "extmem_pll_refclk" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 89
Error (10346): VHDL error at Rx.vhd(1301): formal port or parameter "mem_qk" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1301
Error (10784): HDL error at DOEMIF.vhd(114): see declaration for object "mem_qk" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 114
...

Processor Git Logs


commit 1e2affdf03163ff5e4f1809728b67b13764cc432
Merge: 5cc631f f323f6e
Author: jwebster
Date: Tue May 19 16:00:44 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit f323f6e3ed788536e9d97fd85e24d888972de7b8
Merge: 5785233 2a14d00
Author: John Alison
Date: Tue May 19 15:33:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-18 16:00:58 1:11:03 b9448c9 caea3fb FE 01 07 27188 190 0 136.44 MHz/100.0 MHz 146.33 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150518_171201 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 53,877 / 190,240 ( 28 % )
Total registers 79497
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b9448c98fea67d886aa335c384ecfaf02d00634b
Merge: 50a748d 90bedca
Author: jwebster
Date: Mon May 18 16:01:01 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 90bedcacae2e982eedae73f1b99934f9b6985ccf
Merge: 971d123 77a1150
Author: John Alison
Date: Mon May 18 15:56:29 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-17 16:00:30 1:14:13 3311423 f4adf4e FE 01 07 27171 180 0 145.24 MHz/100.0 MHz 151.91 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150517_171443 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,342 / 190,240 ( 31 % )
Total registers 93611
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.077 DOEMIF:gen_singl...ed|rdaddr_reg[1]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_qls1:auto_generated|rdaddr_reg[1] DOEMIF:gen_singl...t|PC[4]_OTERM299DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|PC[4]_OTERM299
2 -0.034 DOEMIF:gen_singl...ed|rdaddr_reg[2]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_qls1:auto_generated|rdaddr_reg[2] DOEMIF:gen_singl...t|PC[4]_OTERM299DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|PC[4]_OTERM299

Processor Git Logs


commit 331142308b5f30d4b1805d5c9175e721e54c9ba8
Author: John Alison
Date: Sat May 16 09:55:18 2015 -0400

  Compiled Rx_EMIF Black as coal at 120


commit e7c8727193004f06e3dcc5216de1a46fc9ca9444
Merge: bca9923 76d1fe7
Author: John Alison
Date: Fri May 15 15:13:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-16 16:00:10 1:18:06 3311423 f4adf4e FE 01 07 27188 180 0 145.24 MHz/100.0 MHz 151.91 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150516_171816 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,342 / 190,240 ( 31 % )
Total registers 93611
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.077 DOEMIF:gen_singl...ed|rdaddr_reg[1]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_qls1:auto_generated|rdaddr_reg[1] DOEMIF:gen_singl...t|PC[4]_OTERM299DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|PC[4]_OTERM299
2 -0.034 DOEMIF:gen_singl...ed|rdaddr_reg[2]DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_qls1:auto_generated|rdaddr_reg[2] DOEMIF:gen_singl...t|PC[4]_OTERM299DOEMIF:gen_singledo:inst39|RoadProcessorEMIF:RoadProcessor_inst|EMIFRLDRAMII:EMIF_RLDRAMII_inst|EMIFRLDRAMII_0002:emifrldramii_inst|EMIFRLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|PC[4]_OTERM299

Processor Git Logs


commit 331142308b5f30d4b1805d5c9175e721e54c9ba8
Author: John Alison
Date: Sat May 16 09:55:18 2015 -0400

  Compiled Rx_EMIF Black as coal at 120


commit e7c8727193004f06e3dcc5216de1a46fc9ca9444
Merge: bca9923 76d1fe7
Author: John Alison
Date: Fri May 15 15:13:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-15 16:00:28 1:13:51 76d1fe7 f4adf4e FE 01 07 27182 181 0 138.58 MHz/100.0 MHz 150.53 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150515_171419 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,318 / 190,240 ( 31 % )
Total registers 93618
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 76d1fe734c5fb5231d137dfe1516c3a0bb2da10e
Author: Karol Krizka
Date: Fri May 15 09:37:26 2015 +0200

  Constants checksum now uses 10MHz clock.


commit a720bb129061bd6cd0f55e5a7bbf17760c48d84a
Author: John Alison
Date: Thu May 14 15:10:21 2015 -0400

  Duplicating more registers

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-14 16:02:05 1:15:16 a720bb1 f4adf4e FE 01 07 27190 181 0 138.58 MHz/100.0 MHz 150.53 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150514_171721 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,318 / 190,240 ( 31 % )
Total registers 93618
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit a720bb129061bd6cd0f55e5a7bbf17760c48d84a
Author: John Alison
Date: Thu May 14 15:10:21 2015 -0400

  Duplicating more registers


commit 1027fdec436f5f1d57ba7de6ee464b9eb8135ba5
Author: Jamie Saxon
Date: Wed May 13 17:38:55 2015 -0700

  fixing the bug patrick found

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-13 16:00:11 1:35:38 c356062 f4adf4e FE 01 07 27173 181 0 139.63 MHz/100.0 MHz 154.42 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150513_173549 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,343 / 190,240 ( 31 % )
Total registers 93539
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit c356062c101441cec5d9989e9fbd57537693837c
Author: Jamie Saxon
Date: Wed May 13 12:26:31 2015 -0700

  write spybuffers in test bench by default


commit 776ad7ecde9f7046cad17f72ca552f60d503dd27
Author: Jamie Saxon
Date: Tue May 5 13:01:08 2015 -0700

  write spybuffers in test bench by default

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-12 16:00:35 1:14:40 add87a4 f4adf4e FE 01 07 27202 181 0 139.63 MHz/100.0 MHz 154.42 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150512_171515 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,343 / 190,240 ( 31 % )
Total registers 93539
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit add87a4cc843c5672377a97b6863cd9d61dddb52
Author: Karol Krizka
Date: Tue May 12 19:43:42 2015 +0200

  Write constants to memory on 10MHz clock. Tested only with Rx_ROM.


commit e45c5e79441ebb93b035c88df19876fe17a77e26
Author: John Alison
Date: Tue May 12 13:33:36 2015 -0400

  Remove unused read logic in TF

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-11 16:00:07 1:14:11 461d03b 4490937 FE 01 07 27170 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150511_171418 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-10 16:00:27 1:14:44 461d03b 4490937 FE 01 07 27170 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150510_171511 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-09 16:00:08 1:14:36 461d03b 4490937 FE 01 07 27170 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150509_171444 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-08 16:00:18 1:14:54 461d03b 4490937 FE 01 07 27170 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150508_171512 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-07 16:00:07 1:14:21 461d03b 4490937 FE 01 07 27170 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150507_171428 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-06 16:00:13 1:14:55 461d03b 4490937 FE 01 07 27170 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150506_171508 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-05 16:00:02 1:14:18 461d03b 4490937 FE 01 07 27181 181 0 132.03 MHz/100.0 MHz 157.36 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150505_171420 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,187 / 190,240 ( 31 % )
Total registers 93600
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,802 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-04 16:00:02 0:01:27 bb693c9 4490937 N/A 1740 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150504_160129 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1426): formal "do_clk" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1426
Error (10346): VHDL error at Rx.vhd(1425): formal port or parameter "clk" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1425
Error (10784): HDL error at TFInputBufferLogic.vhdl(23): see declaration for object "clk" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 23
Error (10346): VHDL error at Rx.vhd(1425): formal port or parameter "reset" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1425
Error (10784): HDL error at TFInputBufferLogic.vhdl(24): see declaration for object "reset" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 24
Error (10346): VHDL error at Rx.vhd(1425): formal port or parameter "read_enable" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1425
Error (10784): HDL error at TFInputBufferLogic.vhdl(25): see declaration for object "read_enable" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 25
Error (10346): VHDL error at Rx.vhd(1425): formal port or parameter "eoe_in" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1425
Error (10784): HDL error at TFInputBufferLogic.vhdl(27): see declaration for object "eoe_in" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 27
Error (10346): VHDL error at Rx.vhd(1425): formal port or parameter "sector_ready" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1425
Error (10784): HDL error at TFInputBufferLogic.vhdl(28): see declaration for object "sector_ready" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 28
...

Processor Git Logs


commit bb693c9f1b7d044f43df9b06991a2171be0c8ba6
Merge: 86583c3 9431515
Author: Jamie Saxon
Date: Mon May 4 09:12:21 2015 -0700

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 86583c31f785913ca2d563916366290b6fda2604
Author: Jamie Saxon
Date: Mon May 4 09:10:43 2015 -0700

  spy buffer to vme format

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-03 16:00:02 0:01:45 2fd92df 4490937 N/A 1740 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150503_160147 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1028): formal "nextevent" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1028
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LD0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(45): see declaration for object "LD0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 45
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LCTRL_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(46): see declaration for object "LCTRL_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 46
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LWEN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(47): see declaration for object "LWEN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 47
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LDOWN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(48): see declaration for object "LDOWN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 48
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LD1" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(51): see declaration for object "LD1" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 51
...

Processor Git Logs


commit 2fd92df4eac3d95eda21449ef333470ec6f22970
Author: Karol Krizka
Date: Sat May 2 01:25:47 2015 +0200

  Shit really compiles now.


commit fd3b1e85199ff9f2b141196f4e7b9cec9544cb64
Author: Karol Krizka
Date: Sat May 2 01:01:54 2015 +0200

  Things compile a bit better.c

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-02 16:00:02 0:01:44 2fd92df 4490937 N/A 1740 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150502_160146 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1028): formal "nextevent" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1028
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LD0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(45): see declaration for object "LD0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 45
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LCTRL_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(46): see declaration for object "LCTRL_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 46
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LWEN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(47): see declaration for object "LWEN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 47
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LDOWN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(48): see declaration for object "LDOWN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 48
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LD1" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(51): see declaration for object "LD1" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 51
...

Processor Git Logs


commit 2fd92df4eac3d95eda21449ef333470ec6f22970
Author: Karol Krizka
Date: Sat May 2 01:25:47 2015 +0200

  Shit really compiles now.


commit fd3b1e85199ff9f2b141196f4e7b9cec9544cb64
Author: Karol Krizka
Date: Sat May 2 01:01:54 2015 +0200

  Things compile a bit better.c

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-01 16:00:02 0:01:31 ba9bf5c 4490937 N/A 1752 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150501_160133 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1028): formal "nextevent" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1028
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LD0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(45): see declaration for object "LD0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 45
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LCTRL_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(46): see declaration for object "LCTRL_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 46
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LWEN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(47): see declaration for object "LWEN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 47
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LDOWN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(48): see declaration for object "LDOWN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 48
Error (10346): VHDL error at Rx.vhd(1024): formal port or parameter "LD1" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 1024
Error (10784): HDL error at DFSynchronization.vhd(51): see declaration for object "LD1" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 51
...

Processor Git Logs


commit ba9bf5c9ebbcdfb5eb2fa55d3ce251d85ca4f94c
Author: Karol Krizka
Date: Fri May 1 18:20:27 2015 +0200

  Rx_EMIF compiles again in vsim.


commit 505feddade8954621eb81f99fc9ba78c0fb70bee
Author: Karol Krizka
Date: Fri May 1 18:14:17 2015 +0200

  Added temperature sensor.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-04-30 16:00:30 0:01:34 30fee5c 9937988 N/A 1777 24 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150430_160204 .

Leading Errors

Error (10481): VHDL Use Clause error at AMBConverter.vhd(100): design library "work" does not contain primary unit "aux_scfifo" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/AMBConverter.vhd Line: 100
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 149 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_EMIF.pof" does not exist

Processor Git Logs


commit 30fee5cede29e3080dd6c7bc5470ea6edd724539
Merge: a19f412 9bfcd94
Author: John Alison
Date: Thu Apr 30 14:17:57 2015 -0500

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit a19f4122cbec9c58197638babe2fd2717773853c
Author: John Alison
Date: Thu Apr 30 14:17:15 2015 -0500

  Fixing compile errors for Rx_ROM and EMIF

AUXCommon Git Logs


commit e9937988b0410a903a309ecf9d5e3682a85119da
Author: Karol Krizka
Date: Thu Apr 30 08:41:36 2015 +0200

  whitespace


commit 43719b025a0f79f2cb1043ed3dae62cf1eb2654c
Author: Karol Krizka
Date: Fri Apr 24 13:56:08 2015 +0200

  Add overflow and freeze to VMEBuffBlock.

2015-04-29 16:00:08 1:14:38 b3b49ce 3e565fd FE 01 07 27197 176 0 134.97 MHz/100.0 MHz 147.23 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150429_171446 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,273 / 190,240 ( 31 % )
Total registers 93535
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,817 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b3b49ce685cabac13f1d017d082d5806072ae5ad
Merge: d17a9d0 f5f9058
Author: jwebster
Date: Tue Apr 28 10:58:57 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit d17a9d0977445c39b31e62a72d553d88cf7d6a58
Author: jwebster
Date: Tue Apr 28 10:58:52 2015 -0500

  Rx_EMIF nightly

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-28 16:00:07 1:13:35 b3b49ce 3e565fd FE 01 07 27208 176 0 134.97 MHz/100.0 MHz 147.23 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150428_171342 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,273 / 190,240 ( 31 % )
Total registers 93535
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,769,817 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b3b49ce685cabac13f1d017d082d5806072ae5ad
Merge: d17a9d0 f5f9058
Author: jwebster
Date: Tue Apr 28 10:58:57 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit d17a9d0977445c39b31e62a72d553d88cf7d6a58
Author: jwebster
Date: Tue Apr 28 10:58:52 2015 -0500

  Rx_EMIF nightly

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-27 16:00:23 0:04:24 d60df24 3e565fd N/A 4528 39 12 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150427_160447 .

Leading Errors

Error (12014): Net "do_status[28]", which fans out to "vme_latches:vme_latches_inst|words_in[11][28]", cannot be assigned more than one value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 252
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|do_status[28]" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 24
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|local_cal_fail" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 96
Error (12014): Net "do_status[27]", which fans out to "vme_latches:vme_latches_inst|words_in[11][27]", cannot be assigned more than one value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 252
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|do_status[27]" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 24
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|local_cal_success" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 95
Error (12014): Net "do_status[26]", which fans out to "vme_latches:vme_latches_inst|words_in[11][26]", cannot be assigned more than one value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 252
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|do_status[26]" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 24
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|local_init_done" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 94
Error (293001): Quartus II Full Compilation was unsuccessful. 11 errors, 109 warnings
Error (213009): File name "Rx.sof" does not exist
...

Processor Git Logs


commit d60df2455464e45d7b924c43526b55eeaaf40106
Author: John Alison
Date: Mon Apr 27 15:35:07 2015 -0500

  Creatign logiclocks


commit cd947c118dc5cca801ca4a5ee2d4ddaba6ee0c4f
Merge: 32ab7fc a48a8ef
Author: jwebster
Date: Mon Apr 27 11:49:01 2015 -0500

  nightly merge

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-26 16:00:02 0:04:03 98ee7ab 3e565fd N/A 4537 39 12 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150426_160405 .

Leading Errors

Error (12014): Net "do_status[28]", which fans out to "vme_latches:vme_latches_inst|words_in[11][28]", cannot be assigned more than one value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 252
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|do_status[28]" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 24
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|local_cal_fail" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 96
Error (12014): Net "do_status[27]", which fans out to "vme_latches:vme_latches_inst|words_in[11][27]", cannot be assigned more than one value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 252
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|do_status[27]" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 24
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|local_cal_success" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 95
Error (12014): Net "do_status[26]", which fans out to "vme_latches:vme_latches_inst|words_in[11][26]", cannot be assigned more than one value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 252
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|do_status[26]" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 24
Error (12015): Net is fed by "DOEMIF:\gen_singledo:inst39|local_init_done" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/DOEMIF.vhd Line: 94
Error (293001): Quartus II Full Compilation was unsuccessful. 11 errors, 109 warnings
Error (213009): File name "Rx.sof" does not exist
...

Processor Git Logs


commit 98ee7abb8737cdb3ec033957eca8d51e830bc682
Author: jwebster
Date: Sun Apr 26 11:22:31 2015 -0500

  Rx_EMIF nightly


commit 6b2bb26690a6b7c4ff4b5e5e09a18da025fe5cc4
Author: jwebster
Date: Sun Apr 26 01:22:27 2015 -0500

  Rx_ROM nightly

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-25 16:00:27 0:01:41 6f7079e bd25038 N/A 1775 8 5 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150425_160208 .

Leading Errors

Error (10324): VHDL Expression error at Rx.vhd(38): expression ""11111110000000000001"" has 20 elements ; expected 24 elements. File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_EMIF/Rx.vhd Line: 38
Error (12153): Can't elaborate top-level user hierarchy
Error (293001): Quartus II Full Compilation was unsuccessful. 4 errors, 78 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_EMIF.pof" does not exist

Processor Git Logs


commit 6f7079e0ab911909c11385943bea519ec10b5bd9
Author: John Alison
Date: Sat Apr 25 12:52:55 2015 -0500

  Compiling Rxdebug_ROM


commit bf649f78d0fbdb428c58ddd3f290dc5401c85822
Merge: 0c667fe 5ea643c
Author: John Alison
Date: Sat Apr 25 12:45:36 2015 -0500

  Merge branch 'master' of y:/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings


commit b6fa94d726a6d2df6f2fdc0d4f579bd8127b8718
Author: Jamie Saxon
Date: Thu Apr 23 15:16:24 2015 -0700

  fix for hw merging

2015-04-24 16:00:01 1:16:00 8242973 6fa94d7 FE 0 110 27207 313 0 142.49 MHz/100.0 MHz 145.65 MHz/130.01 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_EMIF_master_20150424_171601 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 58,751 / 190,240 ( 31 % )
Total registers 90306
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,765,724 / 24,719,360 ( 31 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 824297398072a1841e8f72e0ecfe83541120d67d
Author: jwebster
Date: Fri Apr 24 15:26:40 2015 -0500

  edited all qsfs so fitters use specific seeds


commit 32cd19b77803f9c79d23e53b416c221006fbffd6
Merge: 3668b10 65bf963
Author: Patrick Bryant
Date: Fri Apr 24 13:21:22 2015 -0500

  Merge remote-tracking branch 'origin/master'

AUXCommon Git Logs


commit b6fa94d726a6d2df6f2fdc0d4f579bd8127b8718
Author: Jamie Saxon
Date: Thu Apr 23 15:16:24 2015 -0700

  fix for hw merging


commit aa785972151c03e3724b0ce8f063ce75239c6607
Author: Karol Krizka
Date: Wed Apr 22 11:04:09 2015 +0200

  Clean up of port order in aux_scfifo_lookahead.



RxDebug_ROM_master

Compile Started Compile Time Processor AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Fitter Effort
2015-07-12 18:30:26 1:12:28 393e4d0 ac61546 FD 01 2F 28082 416 0 129.94 MHz/100.0 MHz 142.63 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150712_194254 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,829 / 190,240 ( 29 % )
Total registers 86546
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -5.555 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:3:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[15]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[15]
2 -3.380 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[13]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[13]
3 -3.267 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:0:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[12]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[12]
4 -3.097 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:2:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[14]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[14]

Processor Git Logs


commit 393e4d0ad77aa7ef1b5c0035b765afb97c185582
Author: Karol Krizka
Date: Thu Jul 9 22:04:12 2015 +0200

  Hold control registers consolidation.


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-11 18:30:35 1:11:43 393e4d0 ac61546 FD 01 2F 28082 416 0 129.94 MHz/100.0 MHz 142.63 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150711_194218 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,829 / 190,240 ( 29 % )
Total registers 86546
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -5.555 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:3:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[15]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[15]
2 -3.380 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[13]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[13]
3 -3.267 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:0:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[12]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[12]
4 -3.097 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:2:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[14]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[14]

Processor Git Logs


commit 393e4d0ad77aa7ef1b5c0035b765afb97c185582
Author: Karol Krizka
Date: Thu Jul 9 22:04:12 2015 +0200

  Hold control registers consolidation.


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-10 18:32:40 1:11:59 393e4d0 ac61546 FD 01 2F 28082 416 0 129.94 MHz/100.0 MHz 142.63 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150710_194439 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,829 / 190,240 ( 29 % )
Total registers 86546
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -5.555 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:3:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[15]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[15]
2 -3.380 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[13]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[13]
3 -3.267 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:0:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[12]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[12]
4 -3.097 RxBlock:RxBlock_i...dc_inst|halffullRxBlock:RxBlock_inst|Xcvr_Road:road_inst|SimpleSimplexLDC:gen_slink:2:ldc_inst|halffull vme_latches:vme_l...nst|word_reg[14]vme_latches:vme_latches_inst|freeze_latch:gen_latches:3:latch_inst|word_reg[14]

Processor Git Logs


commit 393e4d0ad77aa7ef1b5c0035b765afb97c185582
Author: Karol Krizka
Date: Thu Jul 9 22:04:12 2015 +0200

  Hold control registers consolidation.


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-08 18:30:25 1:06:34 393826d ac61546 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150708_193659 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-07 18:33:29 1:07:10 393826d ac61546 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150707_194039 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-06 18:30:22 1:08:03 393826d ac61546 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150706_193825 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-05 18:30:10 1:07:41 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150705_193751 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-04 18:30:24 1:08:51 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150704_193915 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-03 18:30:39 1:07:57 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150703_193836 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-02 18:30:25 1:07:35 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150702_193800 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-01 18:30:09 1:07:46 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150701_193755 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-30 18:30:33 1:08:20 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150630_193853 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-29 18:30:09 1:07:26 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150629_193735 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-28 18:30:39 1:08:15 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150628_193854 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-27 18:30:20 1:07:11 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150627_193731 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-26 18:30:32 1:08:10 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150626_193842 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-25 18:30:09 1:08:28 393826d 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150625_193837 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-24 18:30:02 1:07:39 a2c66eb 5e26926 FD 01 2F 28074 406 0 133.98 MHz/100.0 MHz 142.76 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150624_193741 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,772 / 190,240 ( 29 % )
Total registers 86427
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout


commit a374e80c2a4f22206946de3087c873c5f52f4215
Author: Jordan Webster
Date: Wed Jun 24 10:49:45 2015 -0700

  trying to fix compile fails from disconnected line in DOSpyBuffers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-23 18:30:28 0:01:51 550cde7 5e26926 N/A 1717 0 5 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150623_183219 .

Leading Errors

Error (10346): VHDL error at Rx.vhd(1647): formal port or parameter "top_outLiveLayers" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1647
Error (10784): HDL error at DOSpyBuffers.vhdl(60): see declaration for object "top_outLiveLayers" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/spybuffers/DOSpyBuffers.vhdl Line: 60
Error (293001): Quartus II Full Compilation was unsuccessful. 4 errors, 0 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 550cde79611c68c3c124677cce976e1c46ca5e49
Author: Jordan Webster
Date: Tue Jun 23 17:45:14 2015 -0700

  fixed the LiveLayers typo in DO


commit b4f07514a735cf710098899f3f86624d2f84e8ac
Author: jwebster
Date: Tue Jun 23 16:05:33 2015 -0500

  * updated DOSpyBuffers to include Live Layers
  * shortened sector ID in spy buffers from 16 bits to 13 bits and moved position of layermap
  * Updated TB run script to dump waveform output files, wlf & do

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-22 18:30:09 1:11:23 b0ea31e 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150622_194132 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-21 18:30:33 1:11:20 b0ea31e 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150621_194153 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-20 18:30:37 1:11:27 5975ae1 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150620_194204 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 5975ae14e045d34856d22389db903b59bd074f49
Author: John Alison
Date: Sat Jun 20 22:19:59 2015 +0200

  More Duplications


commit 74f9648de8673baa0048564d2c4ec9cb692e53e4
Author: jwebste2
Date: Fri Jun 19 16:05:55 2015 -0500

  updated nightly compile script

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-19 18:30:40 1:11:12 74f9648 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150619_194152 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 74f9648de8673baa0048564d2c4ec9cb692e53e4
Author: jwebste2
Date: Fri Jun 19 16:05:55 2015 -0500

  updated nightly compile script


commit d77dd035e78d6ac25c3284a702c96cc9af48c4b3
Author: jwebste2
Date: Fri Jun 19 11:33:48 2015 -0500

  updated nightly scripts

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-18 18:30:41 1:09:50 771ba18 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150618_194031 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 771ba18f6632802ff5785640080c93d1940f0952
Author: jwebster
Date: Thu Jun 18 12:23:08 2015 -0500

  nightly compile scripts


commit ae7993cf22664900fc7bdd42478db9eae038b315
Author: jwebster
Date: Thu Jun 18 12:19:20 2015 -0500

  typo in nightly script

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-17 18:30:09 1:10:43 251ae51 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150617_194052 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 251ae51b9e8c16cca3383d84ca59aa952127bbff
Merge: 137fa0b c6a09d2
Author: Jordan Webster
Date: Tue Jun 16 16:34:31 2015 -0700

  Merge branch 'Jordan'


commit c6a09d24a35da4fbb37382514d5ba57cf7b94777
Author: Jordan Webster
Date: Tue Jun 16 16:17:45 2015 -0700

  updated waves for TF road record types

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-16 18:30:50 1:11:18 251ae51 5e26926 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150616_194208 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 251ae51b9e8c16cca3383d84ca59aa952127bbff
Merge: 137fa0b c6a09d2
Author: Jordan Webster
Date: Tue Jun 16 16:34:31 2015 -0700

  Merge branch 'Jordan'


commit c6a09d24a35da4fbb37382514d5ba57cf7b94777
Author: Jordan Webster
Date: Tue Jun 16 16:17:45 2015 -0700

  updated waves for TF road record types

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-15 18:30:30 1:11:08 2468a04 8a74633 FD 01 2F 28074 407 0 127.23 MHz/100.0 MHz 135.78 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150615_194138 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,861 / 190,240 ( 29 % )
Total registers 86384
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,935,444 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 2468a04f311c98f181c37eb974c2d9df354789ab
Merge: 3930cca b14f0e8
Author: unknown
Date: Mon Jun 15 16:32:21 2015 -0700

  Merge remote-tracking branch 'origin/master' into NewDCFlagMap

  Conflicts:
  Rx_EMIF/Rx.qsf
  combined_testbench/compileTF.do


commit 3930cca9f6592df279ed403b6402fe5dfdf26965
Author: unknown
Date: Mon Jun 15 16:29:15 2015 -0700

  looping in EMIF as well and all projects comile. merging

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-14 18:30:40 1:09:23 b14f0e8 8a74633 FD 01 2D 28016 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150614_194003 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b14f0e8d7ffe11a233bc97fea5a5954a39d99ee5
Author: John Alison
Date: Sun Jun 14 15:11:22 2015 +0200

  Updates to the latency to match the chi2


commit 0313f9ef396c612f0e88d34aa4ca66b4439812a7
Author: John Alison
Date: Sun Jun 14 14:40:46 2015 +0200

  Add fanout

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-13 18:30:22 1:09:12 c5178a2 8a74633 FD 01 2D 28016 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150613_193934 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit c5178a29264f669246ec94237617d390f4fb7534
Author: John Alison
Date: Sat Jun 13 04:25:56 2015 -0400

  Bring in changes from pushing timing


commit f5a890edb8cb9e307dfe5d05ecbc6ce981296420
Author: John Alison
Date: Sat Jun 13 04:18:13 2015 -0400

  Valdated Sim

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-12 18:30:22 1:09:11 3451fb6 8a74633 FD 01 2D 28016 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150612_193933 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 3451fb662aa8738c2d9d1117509eaf7cc017d3a0
Merge: bbb0304 210641e
Author: John Alison
Date: Fri Jun 12 08:04:58 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 210641e0744c83d23ae9b78dca223dfe75bc6cc3
Author: Karol Krizka
Date: Fri Jun 12 14:03:16 2015 +0200

  Adjusted TFNomFitter delays to componstate for registering everything.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-11 18:30:08 1:09:36 94e6851 8a74633 FD 01 2D 28016 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150611_193944 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 94e68519ec9e7986d2bf0a608cff6f74f9afa2db
Merge: 93f3ae2 414f714
Author: jwebster
Date: Thu Jun 11 11:49:52 2015 -0500

  Merge branch 'master' of Y:\FTK\Processor_1_20141030


commit 414f714ab9f30dc915a4320b681432b779f4b101
Author: Karol Krizka
Date: Thu Jun 11 11:14:02 2015 +0200

  Delay output layermaps in TFNomFitter to make them synchronous with chi2 output.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-10 18:33:15 0:00:32 e5f42e6 8a74633 N/A 1711 0 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150610_183347 .

Leading Errors

Error (10481): VHDL Use Clause error at TFSctFitterShiftRegister.vhdl(51): design library "work" does not contain primary unit "shiftreg_20x62" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFSctFitterShiftRegister.vhdl Line: 51
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 0 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit e5f42e64ca661618a3a0f640298be9ed3fc0c259
Author: Karol Krizka
Date: Wed Jun 10 23:26:49 2015 +0200

  Updated delays in fitters to account for added pipelining.


commit 52f1a1c793f4f258dd78d7cc3264fa90c97805f4
Author: Karol Krizka
Date: Wed Jun 10 11:20:47 2015 +0200

  Updates to TF loading in run_MergedDOLoop.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-09 18:31:41 1:10:43 983c302 8a74633 FD 01 2D 28013 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150609_194224 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 983c302a638342a01a7c8891b1920ce4fcea1149
Author: Karol Krizka
Date: Tue Jun 9 11:43:25 2015 +0200

  Fixed typo in TFRoadSynchronizer to get it to compile.


commit c80b123e480c7e57594429e23530bee0addae55e
Author: Karol Krizka
Date: Tue Jun 9 11:33:08 2015 +0200

  Fixed roads with ID 0 comming out of buffer logic.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-08 18:30:37 1:10:39 955880d 8a74633 FD 01 2D 28013 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150608_194116 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-07 18:30:09 1:10:50 955880d 8a74633 FD 01 2D 28013 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150607_194059 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-06 18:30:38 1:10:50 955880d 8a74633 FD 01 2D 28013 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150606_194128 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-05 18:30:56 1:10:10 955880d 8a74633 FD 01 2D 28013 402 0 135.81 MHz/100.0 MHz 139.57 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150605_194106 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,380 / 190,240 ( 29 % )
Total registers 81528
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,703 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-03 18:30:31 1:10:53 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150603_194124 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-02 18:30:39 1:10:28 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150602_194107 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-01 18:30:09 1:10:31 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150601_194040 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-31 18:30:44 1:10:25 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150531_194109 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-30 18:30:09 1:11:21 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150530_194130 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-29 18:30:29 1:10:24 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150529_194053 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-28 18:30:09 1:10:27 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150528_194036 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-27 18:30:17 1:10:24 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150527_194041 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-26 18:30:03 1:10:29 e899ea5 8a74633 FD 01 2D 27138 391 0 127.94 MHz/100.0 MHz 140.35 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150526_194032 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,239 / 190,240 ( 29 % )
Total registers 81425
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-25 18:30:14 0:01:01 2cc96cd caea3fb N/A 1711 0 5 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150525_183115 .

Leading Errors

Error (10346): VHDL error at RoadProcessor.vhd(209): formal port or parameter "extmem_emif_success" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/RoadProcessor.vhd Line: 209
Error (10784): HDL error at ExtMemClockInterface.vhd(71): see declaration for object "extmem_emif_success" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/ExtMemClockInterface.vhd Line: 71
Error (293001): Quartus II Full Compilation was unsuccessful. 4 errors, 22 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 2cc96cde8a5f922073369b789173663351425956
Merge: 098d4ed 1dd5d2c
Author: unknown
Date: Mon May 25 13:17:30 2015 -0700

  Merge remote-tracking branch 'origin/master'


commit 098d4edd67819277b12e3f2a37cb29b1e00ffc96
Author: unknown
Date: Mon May 25 13:17:08 2015 -0700

  adding monitoring of emif calibration success flag. DO_Status[22]

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-24 18:30:40 1:09:58 df20913 caea3fb FD 01 2C 27138 391 0 135.72 MHz/100.0 MHz 145.48 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150524_194038 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,231 / 190,240 ( 29 % )
Total registers 79421
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit df209137fc23835ad7980541ad18539681003c2f
Author: John Alison
Date: Sat May 23 15:32:14 2015 -0400

  Bug fixing'


commit b837d788aaec7dd2e830ef853da8799dd8bad9d8
Author: John Alison
Date: Sat May 23 14:28:23 2015 -0400

  Updating types for reg duplication

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-23 18:30:08 1:10:31 df20913 caea3fb FD 01 2C 27138 391 0 135.72 MHz/100.0 MHz 145.48 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150523_194039 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,231 / 190,240 ( 29 % )
Total registers 79421
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit df209137fc23835ad7980541ad18539681003c2f
Author: John Alison
Date: Sat May 23 15:32:14 2015 -0400

  Bug fixing'


commit b837d788aaec7dd2e830ef853da8799dd8bad9d8
Author: John Alison
Date: Sat May 23 14:28:23 2015 -0400

  Updating types for reg duplication

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-22 18:30:47 1:09:36 07726fa caea3fb FD 01 2C 27138 391 0 135.72 MHz/100.0 MHz 145.48 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150522_194023 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,231 / 190,240 ( 29 % )
Total registers 79421
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 07726fab89e1db23051bfa0ddc7dd06f32c20828
Author: John Alison
Date: Fri May 22 17:55:18 2015 -0400

  Updating assignment editor


commit eef1e2e278e696145fe58e20947561d926805088
Author: John Alison
Date: Fri May 22 15:32:10 2015 -0400

  Adding pipelinning to TFRoadSynchron

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-21 18:30:09 1:09:31 df7037b caea3fb FD 01 2C 27138 391 0 135.72 MHz/100.0 MHz 145.48 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150521_193940 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,231 / 190,240 ( 29 % )
Total registers 79421
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit df7037bcac3a8f382231a83d62e5d266f2462959
Author: John Alison
Date: Thu May 21 17:46:41 2015 -0400

  Bug fixes


commit 678aeda869940ddad456b623047485a0b411165a
Author: John Alison
Date: Thu May 21 17:37:42 2015 -0400

  Register and pipeline TF SpyBuffers

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-20 18:30:02 1:10:25 151d62e caea3fb FD 01 2C 27138 391 0 135.72 MHz/100.0 MHz 145.48 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150520_194027 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,231 / 190,240 ( 29 % )
Total registers 79421
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 151d62e815d48241e8e54ad9cd62973678c9defc
Merge: 55fd268 89a43d0
Author: jwebster
Date: Wed May 20 14:27:29 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 89a43d0ad108663b1ef72847857a26bd714c277e
Merge: 0896203 0f8b1c6
Author: John Alison
Date: Wed May 20 12:41:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-19 18:30:38 0:00:59 1e2affd caea3fb N/A 1711 0 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150519_183137 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1334): formal "pix_stream_req" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1334
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 22 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 1e2affdf03163ff5e4f1809728b67b13764cc432
Merge: 5cc631f f323f6e
Author: jwebster
Date: Tue May 19 16:00:44 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit f323f6e3ed788536e9d97fd85e24d888972de7b8
Merge: 5785233 2a14d00
Author: John Alison
Date: Tue May 19 15:33:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-18 18:30:41 1:10:25 b9448c9 caea3fb FD 01 2C 27138 389 0 136.76 MHz/100.0 MHz 144.84 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150518_194106 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 54,031 / 190,240 ( 28 % )
Total registers 78922
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b9448c98fea67d886aa335c384ecfaf02d00634b
Merge: 50a748d 90bedca
Author: jwebster
Date: Mon May 18 16:01:01 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 90bedcacae2e982eedae73f1b99934f9b6985ccf
Merge: 971d123 77a1150
Author: John Alison
Date: Mon May 18 15:56:29 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-17 18:30:10 1:05:16 3311423 f4adf4e FD 01 2C 26925 367 0 134.63 MHz/100.0 MHz 129.62 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150517_193526 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,507 / 190,240 ( 31 % )
Total registers 92790
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 331142308b5f30d4b1805d5c9175e721e54c9ba8
Author: John Alison
Date: Sat May 16 09:55:18 2015 -0400

  Compiled Rx_EMIF Black as coal at 120


commit e7c8727193004f06e3dcc5216de1a46fc9ca9444
Merge: bca9923 76d1fe7
Author: John Alison
Date: Fri May 15 15:13:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-16 18:30:16 1:04:52 3311423 f4adf4e FD 01 2C 26931 367 0 134.63 MHz/100.0 MHz 129.62 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150516_193508 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,507 / 190,240 ( 31 % )
Total registers 92790
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 331142308b5f30d4b1805d5c9175e721e54c9ba8
Author: John Alison
Date: Sat May 16 09:55:18 2015 -0400

  Compiled Rx_EMIF Black as coal at 120


commit e7c8727193004f06e3dcc5216de1a46fc9ca9444
Merge: bca9923 76d1fe7
Author: John Alison
Date: Fri May 15 15:13:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-15 18:30:22 1:04:58 76d1fe7 f4adf4e FD 01 2C 26937 368 0 134.63 MHz/100.0 MHz 129.62 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150515_193520 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,507 / 190,240 ( 31 % )
Total registers 92790
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 76d1fe734c5fb5231d137dfe1516c3a0bb2da10e
Author: Karol Krizka
Date: Fri May 15 09:37:26 2015 +0200

  Constants checksum now uses 10MHz clock.


commit a720bb129061bd6cd0f55e5a7bbf17760c48d84a
Author: John Alison
Date: Thu May 14 15:10:21 2015 -0400

  Duplicating more registers

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-14 18:32:02 1:05:09 a720bb1 f4adf4e FD 01 2C 26934 368 0 134.63 MHz/100.0 MHz 129.62 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150514_193711 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,507 / 190,240 ( 31 % )
Total registers 92790
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit a720bb129061bd6cd0f55e5a7bbf17760c48d84a
Author: John Alison
Date: Thu May 14 15:10:21 2015 -0400

  Duplicating more registers


commit 1027fdec436f5f1d57ba7de6ee464b9eb8135ba5
Author: Jamie Saxon
Date: Wed May 13 17:38:55 2015 -0700

  fixing the bug patrick found

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-13 18:30:18 1:06:29 1027fde f4adf4e FD 01 2C 26925 368 0 134.63 MHz/100.0 MHz 129.62 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150513_193647 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,507 / 190,240 ( 31 % )
Total registers 92790
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 1027fdec436f5f1d57ba7de6ee464b9eb8135ba5
Author: Jamie Saxon
Date: Wed May 13 17:38:55 2015 -0700

  fixing the bug patrick found


commit c356062c101441cec5d9989e9fbd57537693837c
Author: Jamie Saxon
Date: Wed May 13 12:26:31 2015 -0700

  write spybuffers in test bench by default

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-12 18:30:32 1:05:57 76bcfc7 f4adf4e FD 01 2C 26949 368 0 134.63 MHz/100.0 MHz 129.62 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150512_193629 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,507 / 190,240 ( 31 % )
Total registers 92790
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 76bcfc743a69ce5dc66ae3c16f0d9561d90a1b8c
Merge: a2195a4 add87a4
Author: John Alison
Date: Tue May 12 16:58:10 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit a2195a4704b3e090df7410603896717eb43383dc
Author: John Alison
Date: Tue May 12 13:52:12 2015 -0400

  Duplicating the logic going to the checksum

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-11 18:30:12 1:10:39 461d03b 4490937 FD 01 2C 26925 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150511_194051 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-10 18:30:20 1:10:32 461d03b 4490937 FD 01 2C 26925 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150510_194052 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-09 18:30:15 1:10:34 461d03b 4490937 FD 01 2C 26925 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150509_194049 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-08 18:30:21 1:10:26 461d03b 4490937 FD 01 2C 26925 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150508_194047 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-07 18:30:08 1:10:17 461d03b 4490937 FD 01 2C 26925 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150507_194025 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-06 18:30:19 1:10:17 461d03b 4490937 FD 01 2C 26925 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150506_194036 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-05 18:30:03 1:12:46 461d03b 4490937 FD 01 2C 26980 368 0 139.43 MHz/100.0 MHz 143.16 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150505_194249 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,384 / 190,240 ( 31 % )
Total registers 92824
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,758 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 461d03b0fb1b6fbac286f3689e3bbf45cf99cfc9
Author: John Alison
Date: Tue May 5 08:12:46 2015 -0500

  Move RxBasic to use standard emif


commit ecfe82af620a0fe10d35e13232dab23f1db6314f
Author: Karol Krizka
Date: Tue May 5 10:43:42 2015 +0200

  Ported the single clock DOOutputCatcher to RxDebug and made sure both pass synthesis.

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-04 18:30:03 0:01:29 bb693c9 4490937 N/A 1717 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150504_183132 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1429): formal "do_clk" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1429
Error (10346): VHDL error at Rx.vhd(1428): formal port or parameter "clk" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1428
Error (10784): HDL error at TFInputBufferLogic.vhdl(23): see declaration for object "clk" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 23
Error (10346): VHDL error at Rx.vhd(1428): formal port or parameter "reset" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1428
Error (10784): HDL error at TFInputBufferLogic.vhdl(24): see declaration for object "reset" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 24
Error (10346): VHDL error at Rx.vhd(1428): formal port or parameter "read_enable" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1428
Error (10784): HDL error at TFInputBufferLogic.vhdl(25): see declaration for object "read_enable" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 25
Error (10346): VHDL error at Rx.vhd(1428): formal port or parameter "eoe_in" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1428
Error (10784): HDL error at TFInputBufferLogic.vhdl(27): see declaration for object "eoe_in" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 27
Error (10346): VHDL error at Rx.vhd(1428): formal port or parameter "sector_ready" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1428
Error (10784): HDL error at TFInputBufferLogic.vhdl(28): see declaration for object "sector_ready" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 28
...

Processor Git Logs


commit bb693c9f1b7d044f43df9b06991a2171be0c8ba6
Merge: 86583c3 9431515
Author: Jamie Saxon
Date: Mon May 4 09:12:21 2015 -0700

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 86583c31f785913ca2d563916366290b6fda2604
Author: Jamie Saxon
Date: Mon May 4 09:10:43 2015 -0700

  spy buffer to vme format

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-03 18:30:03 0:01:48 2fd92df 4490937 N/A 1717 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150503_183151 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1027): formal "nextevent" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1027
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LD0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(45): see declaration for object "LD0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 45
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LCTRL_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(46): see declaration for object "LCTRL_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 46
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LWEN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(47): see declaration for object "LWEN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 47
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LDOWN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(48): see declaration for object "LDOWN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 48
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LD1" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(51): see declaration for object "LD1" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 51
...

Processor Git Logs


commit 2fd92df4eac3d95eda21449ef333470ec6f22970
Author: Karol Krizka
Date: Sat May 2 01:25:47 2015 +0200

  Shit really compiles now.


commit fd3b1e85199ff9f2b141196f4e7b9cec9544cb64
Author: Karol Krizka
Date: Sat May 2 01:01:54 2015 +0200

  Things compile a bit better.c

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-02 18:30:03 0:01:46 2fd92df 4490937 N/A 1717 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150502_183149 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1027): formal "nextevent" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1027
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LD0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(45): see declaration for object "LD0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 45
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LCTRL_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(46): see declaration for object "LCTRL_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 46
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LWEN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(47): see declaration for object "LWEN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 47
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LDOWN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(48): see declaration for object "LDOWN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 48
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LD1" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(51): see declaration for object "LD1" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 51
...

Processor Git Logs


commit 2fd92df4eac3d95eda21449ef333470ec6f22970
Author: Karol Krizka
Date: Sat May 2 01:25:47 2015 +0200

  Shit really compiles now.


commit fd3b1e85199ff9f2b141196f4e7b9cec9544cb64
Author: Karol Krizka
Date: Sat May 2 01:01:54 2015 +0200

  Things compile a bit better.c

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-05-01 18:30:03 0:01:31 2fd92df 4490937 N/A 1729 6 22 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150501_183134 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1027): formal "nextevent" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1027
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LD0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(45): see declaration for object "LD0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 45
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LCTRL_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(46): see declaration for object "LCTRL_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 46
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LWEN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(47): see declaration for object "LWEN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 47
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LDOWN_N0" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(48): see declaration for object "LDOWN_N0" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 48
Error (10346): VHDL error at Rx.vhd(1023): formal port or parameter "LD1" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1023
Error (10784): HDL error at DFSynchronization.vhd(51): see declaration for object "LD1" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/DFSynchronization.vhd Line: 51
...

Processor Git Logs


commit 2fd92df4eac3d95eda21449ef333470ec6f22970
Author: Karol Krizka
Date: Sat May 2 01:25:47 2015 +0200

  Shit really compiles now.


commit fd3b1e85199ff9f2b141196f4e7b9cec9544cb64
Author: Karol Krizka
Date: Sat May 2 01:01:54 2015 +0200

  Things compile a bit better.c

AUXCommon Git Logs


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.


commit b8d6433973485fe3f248e55bdf30d4a6fe5b4289
Author: Karol Krizka
Date: Fri May 1 17:37:25 2015 +0200

  Added temperature sensor block.

2015-04-30 18:30:34 0:01:41 30fee5c 9937988 N/A 1748 24 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150430_183215 .

Leading Errors

Error (10481): VHDL Use Clause error at AMBConverter.vhd(100): design library "work" does not contain primary unit "aux_scfifo" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/synchronization/AMBConverter.vhd Line: 100
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 134 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 30fee5cede29e3080dd6c7bc5470ea6edd724539
Merge: a19f412 9bfcd94
Author: John Alison
Date: Thu Apr 30 14:17:57 2015 -0500

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit a19f4122cbec9c58197638babe2fd2717773853c
Author: John Alison
Date: Thu Apr 30 14:17:15 2015 -0500

  Fixing compile errors for Rx_ROM and EMIF

AUXCommon Git Logs


commit e9937988b0410a903a309ecf9d5e3682a85119da
Author: Karol Krizka
Date: Thu Apr 30 08:41:36 2015 +0200

  whitespace


commit 43719b025a0f79f2cb1043ed3dae62cf1eb2654c
Author: Karol Krizka
Date: Fri Apr 24 13:56:08 2015 +0200

  Add overflow and freeze to VMEBuffBlock.

2015-04-29 18:30:08 1:09:25 b3b49ce 3e565fd FD 01 25 26951 365 0 131.01 MHz/100.0 MHz 144.51 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150429_193933 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,367 / 190,240 ( 31 % )
Total registers 92729
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,773 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b3b49ce685cabac13f1d017d082d5806072ae5ad
Merge: d17a9d0 f5f9058
Author: jwebster
Date: Tue Apr 28 10:58:57 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit d17a9d0977445c39b31e62a72d553d88cf7d6a58
Author: jwebster
Date: Tue Apr 28 10:58:52 2015 -0500

  Rx_EMIF nightly

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-28 18:30:33 1:10:07 b3b49ce 3e565fd FD 01 25 26951 365 0 131.01 MHz/100.0 MHz 144.51 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150428_194040 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,367 / 190,240 ( 31 % )
Total registers 92729
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,773 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit b3b49ce685cabac13f1d017d082d5806072ae5ad
Merge: d17a9d0 f5f9058
Author: jwebster
Date: Tue Apr 28 10:58:57 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit d17a9d0977445c39b31e62a72d553d88cf7d6a58
Author: jwebster
Date: Tue Apr 28 10:58:52 2015 -0500

  Rx_EMIF nightly

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-27 18:30:08 1:09:02 a93f1ed 3e565fd FD 01 24 26951 365 0 136.28 MHz/100.0 MHz 147.25 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150427_193910 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,444 / 190,240 ( 31 % )
Total registers 92797
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,773 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit a93f1ed2f848856ce340dfd1657664c53e4f4ad5
Author: jwebster
Date: Mon Apr 27 16:05:12 2015 -0500

  RxDebug_EMIF nightly


commit d60df2455464e45d7b924c43526b55eeaaf40106
Author: John Alison
Date: Mon Apr 27 15:35:07 2015 -0500

  Creatign logiclocks

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-26 18:30:10 1:05:17 853f0e0 3e565fd FD 01 23 26951 365 0 134.01 MHz/100.0 MHz 137.42 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150426_193527 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,487 / 190,240 ( 31 % )
Total registers 92766
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,773 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 853f0e092be4d33c316fe503c712c04a690a407e
Merge: 98ee7ab 0d0c33c
Author: jwebster
Date: Sun Apr 26 16:04:31 2015 -0500

  RxDebug_EMIF nightly


commit 98ee7abb8737cdb3ec033957eca8d51e830bc682
Author: jwebster
Date: Sun Apr 26 11:22:31 2015 -0500

  Rx_EMIF nightly

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-25 18:30:04 1:16:28 0509164 3e565fd FD 01 22 27496 379 0 133.01 MHz/100.0 MHz 135.21 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150425_194632 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 59,439 / 190,240 ( 31 % )
Total registers 92695
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,932,773 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 0509164b11faaf883f7257f80bb9466096b575ea
Author: John Alison
Date: Sat Apr 25 17:59:27 2015 -0500

  Fixing compiler warnings


commit 7fde497ee0e2d255f1a7353d038e8b660a7ef3e1
Merge: 4711178 9324a38
Author: John Alison
Date: Sat Apr 25 17:05:01 2015 -0500

  Merge

AUXCommon Git Logs


commit 13e565fdd8a064917b8402ac3a4c56c4746337d9
Author: John Alison
Date: Sat Apr 25 17:59:05 2015 -0500

  Reset init state in prbs checker


commit 2bd250385141f8f6f531d23bbbf4795d0b4d92b4
Author: John Alison
Date: Sat Apr 25 12:14:32 2015 -0500

  Fixes for comiler warnings

2015-04-24 18:30:08 0:04:04 489c9cf 6fa94d7 N/A 3931 82 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150424_183412 .

Leading Errors

Error (12006): Node instance "b2v_inst" instantiates undefined entity "RLDRAMII" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/DOVME.vhd Line: 133
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 356 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 489c9cfd0c85b8f08cab070fd652b0a53eb0bdd2
Author: jwebster
Date: Fri Apr 24 17:17:16 2015 -0500

  RxDebug_EMIF nightly


commit 824297398072a1841e8f72e0ecfe83541120d67d
Author: jwebster
Date: Fri Apr 24 15:26:40 2015 -0500

  edited all qsfs so fitters use specific seeds

AUXCommon Git Logs


commit b6fa94d726a6d2df6f2fdc0d4f579bd8127b8718
Author: Jamie Saxon
Date: Thu Apr 23 15:16:24 2015 -0700

  fix for hw merging


commit aa785972151c03e3724b0ce8f063ce75239c6607
Author: Karol Krizka
Date: Wed Apr 22 11:04:09 2015 +0200

  Clean up of port order in aux_scfifo_lookahead.

2015-04-23 18:30:22 1:07:10 7ffdc0b 6fa94d7 FD 01 1A 27130 580 0 131.23 MHz/100.0 MHz 141.42 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150423_193732 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 60,302 / 190,240 ( 32 % )
Total registers 93748
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,884,078 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 7ffdc0b106067eb3717d462b20e4c1bcd6566d9c
Merge: 60dd377 648ee76
Author: jwebster
Date: Thu Apr 23 16:45:57 2015 -0500

  Merge branch 'master' of Y:\FTK\Processor_1_20141030


commit 648ee76fca9d78fd79121fc5b3b5a6a09c6f346f
Author: Jamie Saxon
Date: Thu Apr 23 15:13:40 2015 -0700

  list to bit check format

AUXCommon Git Logs


commit b6fa94d726a6d2df6f2fdc0d4f579bd8127b8718
Author: Jamie Saxon
Date: Thu Apr 23 15:16:24 2015 -0700

  fix for hw merging


commit aa785972151c03e3724b0ce8f063ce75239c6607
Author: Karol Krizka
Date: Wed Apr 22 11:04:09 2015 +0200

  Clean up of port order in aux_scfifo_lookahead.

2015-04-22 18:30:03 1:13:15 8345842 a785972 FD 01 19 28004 902 0 127.89 MHz/100.0 MHz 147.6 MHz/120.0 MHz STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150422_194318 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 60,118 / 190,240 ( 32 % )
Total registers 93753
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 7,884,078 / 24,719,360 ( 32 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.041 DOVME:DOVME_inst|...ed|rdaddr_reg[2]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[2] DOVME:DOVME_inst|...ed|rdaddr_reg[0]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[0]
2 -0.030 DOVME:DOVME_inst|...ed|rdaddr_reg[2]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[2] DOVME:DOVME_inst|...ed|rdaddr_reg[3]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[3]
3 -0.028 DOVME:DOVME_inst|...ed|rdaddr_reg[2]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[2] DOVME:DOVME_inst|...t|PC[3]_OTERM301DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|PC[3]_OTERM301
4 -0.027 DOVME:DOVME_inst|...ed|rdaddr_reg[2]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[2] DOVME:DOVME_inst|...ed|rdaddr_reg[2]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[2]
5 -0.025 DOVME:DOVME_inst|...ed|rdaddr_reg[2]DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|rw_manager_inst_ROM_no_ifdef_params:inst_ROM_i|altsyncram:altsyncram_component|altsyncram_p8s1:auto_generated|rdaddr_reg[2] DOVME:DOVME_inst|...t|PC[2]_OTERM303DOVME:DOVME_inst|RLDRAMII:b2v_inst|RLDRAMII_0002:rldramii_inst|RLDRAMII_s0:s0|rw_manager_rldram:sequencer_rw_mgr_inst|rw_manager_generic:rw_mgr_inst|rw_manager_core:rw_mgr_core_inst|PC[2]_OTERM303

Processor Git Logs


commit 8345842c77cce8bb40035f70c1693de17efe2cbe
Merge: 5953f33 f79477b
Author: jwebster
Date: Wed Apr 22 16:27:15 2015 -0500

  Merge branch 'master' of Y:\FTK\Processor_1_20141030


commit f79477bb9ce5e649540e05ad61a5c01e17197790
Author: Jamie Saxon
Date: Wed Apr 22 15:37:43 2015 -0700

  more options for running with fast tf constants mem loading

AUXCommon Git Logs


commit aa785972151c03e3724b0ce8f063ce75239c6607
Author: Karol Krizka
Date: Wed Apr 22 11:04:09 2015 +0200

  Clean up of port order in aux_scfifo_lookahead.


commit 49f6c0a28655a985e84474210770a2979889f826
Author: Karol Krizka
Date: Sat Apr 18 00:03:59 2015 +0200

  Fixed hold bug with headers/trailers in pixel SSMap.

2015-04-21 18:30:06 0:01:25 dc81b66 9f6c0a2 N/A 1785 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150421_183131 .

Leading Errors

Error (10476): VHDL error at Rx.vhd(1290): type of identifier "doip_pix_stream_data" does not agree with its usage as "DO_pixwordssid_vector_layers" type File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1290
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit dc81b66c509b9a26414b023c0439d6e21c889cf5
Author: jwebster
Date: Tue Apr 21 04:16:43 2015 -0500

  Rx_ROM nightly


commit 30231f9adf5dce603e5d5d054813429bfd26edf3
Author: jwebster
Date: Mon Apr 20 18:31:56 2015 -0500

  RxDebug_ROM nightly

AUXCommon Git Logs


commit 49f6c0a28655a985e84474210770a2979889f826
Author: Karol Krizka
Date: Sat Apr 18 00:03:59 2015 +0200

  Fixed hold bug with headers/trailers in pixel SSMap.


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.

2015-04-20 18:30:03 0:01:21 9903947 9f6c0a2 N/A 1785 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150420_183124 .

Leading Errors

Error (10476): VHDL error at Rx.vhd(1290): type of identifier "doip_pix_stream_data" does not agree with its usage as "DO_pixwordssid_vector_layers" type File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1290
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 990394730b21947645a777d4f0b3b90d59ce21dd
Author: jwebster
Date: Mon Apr 20 04:42:40 2015 -0500

  Rx_ROM nightly


commit 4cf8f276a2156350e83c840dcee1e0a1125534d2
Author: jwebster
Date: Sun Apr 19 18:32:02 2015 -0500

  RxDebug_ROM nightly

AUXCommon Git Logs


commit 49f6c0a28655a985e84474210770a2979889f826
Author: Karol Krizka
Date: Sat Apr 18 00:03:59 2015 +0200

  Fixed hold bug with headers/trailers in pixel SSMap.


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.

2015-04-19 18:30:03 0:01:23 b1744bc 9f6c0a2 N/A 1785 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150419_183126 .

Leading Errors

Error (10476): VHDL error at Rx.vhd(1290): type of identifier "doip_pix_stream_data" does not agree with its usage as "DO_pixwordssid_vector_layers" type File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1290
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit b1744bcb89d6debd838a7325d8269a26b4ffd097
Author: jwebster
Date: Sun Apr 19 04:31:48 2015 -0500

  Rx_ROM nightly


commit b3ee2f2b9d3af88ecea0587d05e3dddeb24967bf
Author: jwebster
Date: Sat Apr 18 18:31:37 2015 -0500

  RxDebug_ROM nightly

AUXCommon Git Logs


commit 49f6c0a28655a985e84474210770a2979889f826
Author: Karol Krizka
Date: Sat Apr 18 00:03:59 2015 +0200

  Fixed hold bug with headers/trailers in pixel SSMap.


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.

2015-04-18 18:30:03 0:01:04 4f4b567 9f6c0a2 N/A 1791 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150418_183107 .

Leading Errors

Error (10476): VHDL error at Rx.vhd(1290): type of identifier "doip_pix_stream_data" does not agree with its usage as "DO_pixwordssid_vector_layers" type File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1290
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 4f4b567ec359a84ff636deb9d6a5e8f5d89dcf29
Author: jwebster
Date: Sat Apr 18 03:56:37 2015 -0500

  Rx_ROM nightly


commit 601dea5501c2e1a455bc22fd656d2f8a184966b9
Author: John Alison
Date: Fri Apr 17 19:51:08 2015 -0400

  Move spyreq to merged stream

AUXCommon Git Logs


commit 49f6c0a28655a985e84474210770a2979889f826
Author: Karol Krizka
Date: Sat Apr 18 00:03:59 2015 +0200

  Fixed hold bug with headers/trailers in pixel SSMap.


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.

2015-04-17 18:30:25 0:01:29 59baac1 9f6c0a2 N/A 1815 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150417_183154 .

Leading Errors

Error (10476): VHDL error at Rx.vhd(1290): type of identifier "doip_pix_stream_data" does not agree with its usage as "DO_pixwordssid_vector_layers" type File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1290
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 59baac10a7253edbcf97e986576eb2ac35543018
Author: Jamie Saxon
Date: Fri Apr 17 16:10:44 2015 -0700

  merge after a small update to test bench to start on mem loading, no changes to default


commit 5a620b606e3afac02d8754d98bac9caddfc3aab6
Author: jwebster
Date: Fri Apr 17 04:49:29 2015 -0500

  Rx_ROM nightly

AUXCommon Git Logs


commit 49f6c0a28655a985e84474210770a2979889f826
Author: Karol Krizka
Date: Sat Apr 18 00:03:59 2015 +0200

  Fixed hold bug with headers/trailers in pixel SSMap.


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.

2015-04-16 18:30:07 0:01:08 4083b80 5a79f01 N/A 1806 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150416_183115 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1480): formal "slow_consts_out" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1480
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 4083b80442182f24f338e1a52523d5487766e644
Merge: f678d29 e29c1c4
Author: jwebste2
Date: Thu Apr 16 15:48:08 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit f678d298aca80f37caf1824ac8637f0a9ffcfdb5
Author: jwebste2
Date: Thu Apr 16 15:48:06 2015 -0500

  updated pixlayermap in constants memory so there is no extraneous bit

AUXCommon Git Logs


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.


commit 1146d3ccc9031b04cd83cf539a91e4c3d5cab4be
Author: Karol Krizka
Date: Sat Apr 11 19:54:40 2015 +0200

  Implement LFF_N in PacketMarker2.

2015-04-15 18:31:30 0:01:49 e3dec1a 5a79f01 N/A 1785 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150415_183319 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1480): formal "slow_consts_out" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1480
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit e3dec1a712ad85b55f4e5f8c960b5b169cf7e59c
Author: jwebster
Date: Wed Apr 15 09:25:04 2015 -0500

  tinkering with TF testbench


commit c268af02853b76a40590112a44f4bfe6f6acf828
Author: jwebster
Date: Wed Apr 15 09:12:30 2015 -0500

  cleanup

AUXCommon Git Logs


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.


commit 1146d3ccc9031b04cd83cf539a91e4c3d5cab4be
Author: Karol Krizka
Date: Sat Apr 11 19:54:40 2015 +0200

  Implement LFF_N in PacketMarker2.

2015-04-14 18:30:01 0:01:01 1d2cfc4 5a79f01 N/A 1806 7 4 - - STANDARD
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150414_183102 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1480): formal "slow_consts_out" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/RxDebug_ROM/Rx.vhd Line: 1480
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 1d2cfc4b25f3a74a82debd6549fd70e829b6341a
Merge: 905e173 d79f3c6
Author: jwebster
Date: Tue Apr 14 18:30:02 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 905e17378344bb45af25ff594d9dcd9220678b3f
Author: jwebster
Date: Tue Apr 14 18:04:09 2015 -0500

  tinkering with false paths

AUXCommon Git Logs


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.


commit 1146d3ccc9031b04cd83cf539a91e4c3d5cab4be
Author: Karol Krizka
Date: Sat Apr 11 19:54:40 2015 +0200

  Implement LFF_N in PacketMarker2.

2015-04-13 18:30:01 0:01:28 f432b71 5a79f01 N/A 1833 7 4 - - -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150413_183129 .

Leading Errors

Error (10476): VHDL error at TFSctLayerConstructor.vhdl(31): type of identifier "sctcol_in" does not agree with its usage as "std_ulogic" type File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFSctLayerConstructor.vhdl Line: 31
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit f432b715bc3624d39022d441f90b3be7a8a783a8
Author: jwebste2
Date: Mon Apr 13 11:56:00 2015 -0500

  tinkering with guessed pix hit ordering


commit 39deb28ca0a217385b33c52418f186f900bd0d69
Author: Karol Krizka
Date: Mon Apr 13 09:49:49 2015 +0200

  Timing closure improvements.

AUXCommon Git Logs


commit d5a79f01dc88f36cf525f276c301a2dacc6480bf
Author: Karol Krizka
Date: Mon Apr 13 09:46:17 2015 +0200

  Tweaks for timing closure.


commit 1146d3ccc9031b04cd83cf539a91e4c3d5cab4be
Author: Karol Krizka
Date: Sat Apr 11 19:54:40 2015 +0200

  Implement LFF_N in PacketMarker2.

2015-04-12 18:30:01 0:01:02 4f4d8b7 146d3cc N/A 1824 7 4 - - -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150412_183103 .

Leading Errors

Error (10481): VHDL Use Clause error at TFSctFitterBlock.vhdl(288): design library "work" does not contain primary unit "TFFitFIFO" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/TF/project/TFSctFitterBlock.vhdl Line: 288
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 4f4d8b70d4a75a2035dce275fb488531598c4b53
Author: jwebster
Date: Sun Apr 12 15:14:17 2015 -0500

  nightly


commit fefc4aec42cdf1745ee54aaf231c20345c09dea9
Author: John Alison
Date: Sat Apr 11 09:23:00 2015 -0500

  Compiled with new spybuff depths

AUXCommon Git Logs


commit 1146d3ccc9031b04cd83cf539a91e4c3d5cab4be
Author: Karol Krizka
Date: Sat Apr 11 19:54:40 2015 +0200

  Implement LFF_N in PacketMarker2.


commit 14b765321e21f9a3e21619c4a3de620658ee7cab
Author: Karol Krizka
Date: Fri Apr 10 14:57:54 2015 +0200

  Increased size of VMEBuffBlock to 14 bits. Added log2c to VMEBuffBlock.

2015-04-11 18:30:20 0:01:08 329c83a 146d3cc N/A 1785 7 4 - - -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150411_183128 .

Leading Errors

Error (10349): VHDL Association List error at DOSpyBuffers.vhdl(528): formal "LOG2DEPTH" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/spybuffers/DOSpyBuffers.vhdl Line: 528
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 329c83a5439bd409f59db910adb5f88d13afc30a
Author: John Alison
Date: Thu Apr 9 18:13:31 2015 -0500

  Testing DOSpybuffer EOR in modelsim


commit 237faefa8fd9b9d60801e3d1d1c5f74ecde9f41e
Author: John Alison
Date: Thu Apr 9 18:06:59 2015 -0500

  Bug fix to SCT EOR DO spybuffs

AUXCommon Git Logs


commit 1146d3ccc9031b04cd83cf539a91e4c3d5cab4be
Author: Karol Krizka
Date: Sat Apr 11 19:54:40 2015 +0200

  Implement LFF_N in PacketMarker2.


commit 14b765321e21f9a3e21619c4a3de620658ee7cab
Author: Karol Krizka
Date: Fri Apr 10 14:57:54 2015 +0200

  Increased size of VMEBuffBlock to 14 bits. Added log2c to VMEBuffBlock.

2015-04-10 18:30:19 0:00:50 329c83a 4b76532 N/A 1797 7 4 - - -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150410_183109 .

Leading Errors

Error (10349): VHDL Association List error at DOSpyBuffers.vhdl(528): formal "LOG2DEPTH" does not exist File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/spybuffers/DOSpyBuffers.vhdl Line: 528
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 7 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "RxDebug_ROM.pof" does not exist

Processor Git Logs


commit 329c83a5439bd409f59db910adb5f88d13afc30a
Author: John Alison
Date: Thu Apr 9 18:13:31 2015 -0500

  Testing DOSpybuffer EOR in modelsim


commit 237faefa8fd9b9d60801e3d1d1c5f74ecde9f41e
Author: John Alison
Date: Thu Apr 9 18:06:59 2015 -0500

  Bug fix to SCT EOR DO spybuffs

AUXCommon Git Logs


commit 14b765321e21f9a3e21619c4a3de620658ee7cab
Author: Karol Krizka
Date: Fri Apr 10 14:57:54 2015 +0200

  Increased size of VMEBuffBlock to 14 bits. Added log2c to VMEBuffBlock.


commit 1bb434baddfc7c4896a0ca6cae8454844850bcd4
Author: Karol Krizka
Date: Fri Apr 10 10:47:03 2015 +0200

  Moved slink crcgen into a separate entity to allow both lsc and ldc cores on same firmware.

2015-04-09 16:00:00 1:18:25 Missing cd3c255 N/A 28202 953 0 129.75 MHz/100.0 MHz 141.94 MHz/120.0 MHz -
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_RxDebug_ROM_master_20150409_171825 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 60,467 / 190,240 ( 32 % )
Total registers 93900
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 8,162,606 / 24,719,360 ( 33 % )
Total DSP Blocks 0 / 1,156 ( 0 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs

Missing

AUXCommon Git Logs


commit 2cd3c25542e6232c8464443b8555f55b9b2dbc3f
Author: Jamie Saxon
Date: Thu Apr 9 12:11:54 2015 -0500

  fixes to packet merger for robustness: full trailers and headers ready before processing


commit c64c53eff264091daa8c5daaaeae03744d097b3f
Author: Jamie Saxon
Date: Thu Apr 9 12:11:06 2015 -0500

  psfifo32 still needs to be used



Rx_EMIF_Jordan

Compile Started Compile Time Processor AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Fitter Effort
2015-07-12 13:03:52 6:00:33 eab572f af3580d F2 00 55 54949 351 0 136.41 MHz/100.0 MHz 106.77 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150712_190425 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,223 / 190,240 ( 64 % )
Total registers 223568
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,562,979 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths


Processor Git Logs


commit eab572fa73593cae50140fbdcdeda9406816b05d
Author: jwebste2
Date: Thu Jul 9 16:19:20 2015 -0500

  updating pack layer


commit 1131c8b48731f02a2b4850e13346f9b387b589c8
Author: Jordan Webster
Date: Tue Jul 7 16:19:32 2015 -0700

  * changing clock freq back to 120
  * temporarily changing falling_edge -> rising_edge in Roadsynchronizer

AUXCommon Git Logs


commit eaf3580d5a827dd6c36d9e614444c76d0e783cf3
Author: jwebste2
Date: Tue Jul 7 17:35:12 2015 -0500

  typo


commit 61d4e0cf32488697e3e573c249d185d705d5829d
Author: jwebste2
Date: Tue Jul 7 14:51:45 2015 -0500

  added q_valid flag to aux_scfifo

2015-07-11 13:03:53 5:58:28 eab572f af3580d F2 00 55 54949 351 0 136.41 MHz/100.0 MHz 106.77 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150711_190221 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,223 / 190,240 ( 64 % )
Total registers 223568
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,562,979 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths


Processor Git Logs


commit eab572fa73593cae50140fbdcdeda9406816b05d
Author: jwebste2
Date: Thu Jul 9 16:19:20 2015 -0500

  updating pack layer


commit 1131c8b48731f02a2b4850e13346f9b387b589c8
Author: Jordan Webster
Date: Tue Jul 7 16:19:32 2015 -0700

  * changing clock freq back to 120
  * temporarily changing falling_edge -> rising_edge in Roadsynchronizer

AUXCommon Git Logs


commit eaf3580d5a827dd6c36d9e614444c76d0e783cf3
Author: jwebste2
Date: Tue Jul 7 17:35:12 2015 -0500

  typo


commit 61d4e0cf32488697e3e573c249d185d705d5829d
Author: jwebste2
Date: Tue Jul 7 14:51:45 2015 -0500

  added q_valid flag to aux_scfifo

2015-07-10 13:04:38 6:17:24 eab572f af3580d F2 00 55 54949 351 0 136.41 MHz/100.0 MHz 106.77 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150710_192202 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,223 / 190,240 ( 64 % )
Total registers 223568
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,562,979 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths


Processor Git Logs


commit eab572fa73593cae50140fbdcdeda9406816b05d
Author: jwebste2
Date: Thu Jul 9 16:19:20 2015 -0500

  updating pack layer


commit 1131c8b48731f02a2b4850e13346f9b387b589c8
Author: Jordan Webster
Date: Tue Jul 7 16:19:32 2015 -0700

  * changing clock freq back to 120
  * temporarily changing falling_edge -> rising_edge in Roadsynchronizer

AUXCommon Git Logs


commit eaf3580d5a827dd6c36d9e614444c76d0e783cf3
Author: jwebste2
Date: Tue Jul 7 17:35:12 2015 -0500

  typo


commit 61d4e0cf32488697e3e573c249d185d705d5829d
Author: jwebste2
Date: Tue Jul 7 14:51:45 2015 -0500

  added q_valid flag to aux_scfifo

2015-07-09 13:03:26 6:11:07 1131c8b af3580d F2 00 55 54949 351 0 136.41 MHz/100.0 MHz 106.77 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150709_191433 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,223 / 190,240 ( 64 % )
Total registers 223568
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,562,979 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths


Processor Git Logs


commit 1131c8b48731f02a2b4850e13346f9b387b589c8
Author: Jordan Webster
Date: Tue Jul 7 16:19:32 2015 -0700

  * changing clock freq back to 120
  * temporarily changing falling_edge -> rising_edge in Roadsynchronizer


commit b1a67900bbb5f633735fd1221c72d75e221c90dc
Author: Jordan Webster
Date: Tue Jul 7 16:14:26 2015 -0700

  debugging TFPackLayer.vhdl

AUXCommon Git Logs


commit eaf3580d5a827dd6c36d9e614444c76d0e783cf3
Author: jwebste2
Date: Tue Jul 7 17:35:12 2015 -0500

  typo


commit 61d4e0cf32488697e3e573c249d185d705d5829d
Author: jwebste2
Date: Tue Jul 7 14:51:45 2015 -0500

  added q_valid flag to aux_scfifo

2015-07-08 13:00:06 6:14:21 1131c8b af3580d F2 00 55 54949 351 0 136.41 MHz/100.0 MHz 106.77 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150708_191427 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,223 / 190,240 ( 64 % )
Total registers 223568
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,562,979 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths


Processor Git Logs


commit 1131c8b48731f02a2b4850e13346f9b387b589c8
Author: Jordan Webster
Date: Tue Jul 7 16:19:32 2015 -0700

  * changing clock freq back to 120
  * temporarily changing falling_edge -> rising_edge in Roadsynchronizer


commit b1a67900bbb5f633735fd1221c72d75e221c90dc
Author: Jordan Webster
Date: Tue Jul 7 16:14:26 2015 -0700

  debugging TFPackLayer.vhdl

AUXCommon Git Logs


commit eaf3580d5a827dd6c36d9e614444c76d0e783cf3
Author: jwebste2
Date: Tue Jul 7 17:35:12 2015 -0500

  typo


commit 61d4e0cf32488697e3e573c249d185d705d5829d
Author: jwebste2
Date: Tue Jul 7 14:51:45 2015 -0500

  added q_valid flag to aux_scfifo

2015-07-07 16:27:39 0:02:29 1131c8b 1d4e0cf N/A 1717 1 5 - - AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150707_163008 .

Leading Errors

Error (10500): VHDL syntax error at aux_scfifo.vhd(118) near text "UpdateValid"; expecting "process" File: C:/Users/jswebster/Desktop/project/jordan/AUXCommon/fifo/aux_scfifo.vhd Line: 118
Error (10500): VHDL syntax error at aux_scfifo.vhd(129) near text "architecture"; expecting "process" File: C:/Users/jswebster/Desktop/project/jordan/AUXCommon/fifo/aux_scfifo.vhd Line: 129
Error (293001): Quartus II Full Compilation was unsuccessful. 4 errors, 1 warning
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit 1131c8b48731f02a2b4850e13346f9b387b589c8
Author: Jordan Webster
Date: Tue Jul 7 16:19:32 2015 -0700

  * changing clock freq back to 120
  * temporarily changing falling_edge -> rising_edge in Roadsynchronizer


commit b1a67900bbb5f633735fd1221c72d75e221c90dc
Author: Jordan Webster
Date: Tue Jul 7 16:14:26 2015 -0700

  debugging TFPackLayer.vhdl

AUXCommon Git Logs


commit 61d4e0cf32488697e3e573c249d185d705d5829d
Author: jwebste2
Date: Tue Jul 7 14:51:45 2015 -0500

  added q_valid flag to aux_scfifo


commit 3da1141df4bf135555053b58a8878dd1db00119b
Author: jwebste2
Date: Wed Jun 24 15:53:29 2015 -0500

  made aux_scfifo generic enough to be used as show_ahead, removing need for separate aux_scfifo_lookahead

2015-06-30 13:00:37 0:03:06 fdc5558 da1141d N/A 1716 13 9 - - AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150630_130343 .

Leading Errors

Error (10500): VHDL syntax error at TFSctRoadFIFO.vhdl(27) near text ")"; expecting an identifier, or "constant", or "file", or "signal", or "variable" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFSctRoadFIFO.vhdl Line: 27
Error (10523): Ignored construct TFSctRoadFIFO at TFSctRoadFIFO.vhdl(21) due to previous errors File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFSctRoadFIFO.vhdl Line: 21
Error (10500): VHDL syntax error at TFPixRoadFIFO.vhdl(28) near text ")"; expecting an identifier, or "constant", or "file", or "signal", or "variable" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFPixRoadFIFO.vhdl Line: 28
Error (10523): Ignored construct TFPixRoadFIFO at TFPixRoadFIFO.vhdl(22) due to previous errors File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFPixRoadFIFO.vhdl Line: 22
Error (10500): VHDL syntax error at TFNomRoadFIFO.vhdl(28) near text ")"; expecting an identifier, or "constant", or "file", or "signal", or "variable" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFNomRoadFIFO.vhdl Line: 28
Error (10523): Ignored construct TFNomRoadFIFO at TFNomRoadFIFO.vhdl(22) due to previous errors File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFNomRoadFIFO.vhdl Line: 22
Error (293001): Quartus II Full Compilation was unsuccessful. 8 errors, 13 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit fdc555895c5c3f96c8e15af663b08b6b23a848dd
Author: jwebste2
Date: Tue Jun 30 11:55:18 2015 -0500

  removed some road records, but not all


commit baba137e6ead4699a9aa1e2c9f4dc67ae6cccd67
Author: jwebste2
Date: Mon Jun 29 11:07:28 2015 -0500

  nightly scripts

AUXCommon Git Logs


commit 3da1141df4bf135555053b58a8878dd1db00119b
Author: jwebste2
Date: Wed Jun 24 15:53:29 2015 -0500

  made aux_scfifo generic enough to be used as show_ahead, removing need for separate aux_scfifo_lookahead


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.

2015-06-25 18:19:34 10:47:33 b407755 da1141d F2 00 4F 54964 342 0 124.83 MHz/100.0 MHz 55.87 MHz/150.02 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150626_050707 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 123,037 / 190,240 ( 65 % )
Total registers 225138
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,562,979 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths


Processor Git Logs


commit b407755be54a92a89af321ff86b543fd939b1e19
Author: jwebster
Date: Thu Jun 25 18:17:10 2015 -0500

  typos


commit ab2184fcff100bea7865a81fb4237e13a6110040
Author: jwebste2
Date: Thu Jun 25 18:13:05 2015 -0500

  Updated Rx_EMIF/Rx.vhd for new inputbufferlogc

AUXCommon Git Logs


commit 3da1141df4bf135555053b58a8878dd1db00119b
Author: jwebste2
Date: Wed Jun 24 15:53:29 2015 -0500

  made aux_scfifo generic enough to be used as show_ahead, removing need for separate aux_scfifo_lookahead


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.

2015-06-25 18:00:01 0:02:17 1fd0747 da1141d N/A 1722 13 22 - - AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_Jordan_20150625_180218 .

Leading Errors

Error (10349): VHDL Association List error at Rx.vhd(1427): formal "sector_ready" does not exist File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1427
Error (10346): VHDL error at Rx.vhd(1423): formal port or parameter "eoe_in" must have actual or default value File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1423
Error (10784): HDL error at TFInputBufferLogic.vhdl(27): see declaration for object "eoe_in" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 27
Error (10346): VHDL error at Rx.vhd(1423): formal port or parameter "road_valid" must have actual or default value File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1423
Error (10784): HDL error at TFInputBufferLogic.vhdl(28): see declaration for object "road_valid" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 28
Error (10346): VHDL error at Rx.vhd(1423): formal port or parameter "road_in" must have actual or default value File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1423
Error (10784): HDL error at TFInputBufferLogic.vhdl(29): see declaration for object "road_in" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 29
Error (10346): VHDL error at Rx.vhd(1423): formal port or parameter "sector_valid" must have actual or default value File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1423
Error (10784): HDL error at TFInputBufferLogic.vhdl(30): see declaration for object "sector_valid" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 30
Error (10346): VHDL error at Rx.vhd(1423): formal port or parameter "sector_in" must have actual or default value File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1423
Error (10784): HDL error at TFInputBufferLogic.vhdl(31): see declaration for object "sector_in" File: C:/Users/jswebster/Desktop/project/jordan/Processor_1_20141030/TF/project/TFInputBufferLogic.vhdl Line: 31
...

Processor Git Logs


commit 1fd0747cf02dcc498a0797af484c85e2c90bdf96
Author: jwebster
Date: Thu Jun 25 17:45:55 2015 -0500

  * turned back on duplicate logic removal in TF
  * changed outclk[1] to 150 MHz in Rx_EMIF


commit 54ab0806fc7475355bed96d9650b6c263228b03b
Author: jwebster
Date: Thu Jun 25 13:01:14 2015 -0500

  changed RoadSynchronizer to latch on falling edge, validated in modelsim for ttbar_partial by eye

AUXCommon Git Logs


commit 3da1141df4bf135555053b58a8878dd1db00119b
Author: jwebste2
Date: Wed Jun 24 15:53:29 2015 -0500

  made aux_scfifo generic enough to be used as show_ahead, removing need for separate aux_scfifo_lookahead


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.



Rx_EMIF_master

Compile Started Compile Time Processor AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Fitter Effort
2015-07-08 07:04:58 6:23:07 393826d ac61546 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150708_132805 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit dac61546e3d985fe4086535724c5337931fbc926
Author: Karol Krizka
Date: Mon Jul 6 21:24:23 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.


commit 4402ccd2905084aec3b09dacfadd55e5b6f7e241
Author: Karol Krizka
Date: Mon Jul 6 21:22:29 2015 +0200

  Added HOLD ignore on SLINK, disable for SimpleSimplexL*C.

2015-07-06 07:00:28 6:05:06 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150706_130534 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-05 07:00:49 6:26:49 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150705_132738 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-04 07:00:51 6:05:28 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150704_130619 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-03 07:00:39 6:04:09 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150703_130448 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-02 07:00:17 6:08:56 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150702_130913 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-07-01 07:00:29 6:03:30 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150701_130359 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-30 07:00:49 6:03:34 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150630_130423 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-29 07:02:18 6:06:02 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150629_130820 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-28 07:00:56 6:05:10 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150628_130606 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-27 07:00:45 6:02:50 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150627_130335 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-26 07:00:18 6:09:06 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150626_130924 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-25 07:00:02 6:06:45 393826d 5e26926 F2 00 4F 54980 341 0 140.25 MHz/100.0 MHz 106.93 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150625_130647 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 122,805 / 190,240 ( 65 % )
Total registers 225465
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.019 TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[1][10][17] TFBlock:inst7|Tra...onsts[1][10][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|consts[1][10][17]
2 -0.995 TFBlock:inst7|Tra...tconsts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[3][2][3] TFBlock:inst7|Tra...|consts[3][2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[3][2][3]
3 -0.987 TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXPixFO:CONSTMEMPIXFANOUT|pix1_outconsts[3][10][2] TFBlock:inst7|Tra...consts[3][10][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixCombiner:COMBINER|consts[3][10][2]
4 -0.975 TFBlock:inst7|Tra...tcols_dup5[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup5[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT4|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]
5 -0.922 TFBlock:inst7|Tra...xcols_dup5[2][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixcols_dup5[2][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT2|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_1|data_out_wire[3]

Processor Git Logs


commit 393826dcfe2ecb9fcbc78d8cfae366b39aaef8a5
Author: jwebste2
Date: Wed Jun 24 23:16:01 2015 -0500

  Updated Rx_EMIF/Rx.qsf so that removal of duplicate registers is not turned off for the entire TF - this boosted fMax by 35 MHz in the push150MHz branch


commit a2c66ebb6ffebb4c229c730ac29c47ccd6b24739
Author: jwebste2
Date: Wed Jun 24 14:48:54 2015 -0500

  updated forced duplicate registers in Rx_ROM/Rx.qsf : TFRoadOragnizer fanout

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-24 07:00:44 0:01:47 550cde7 5e26926 N/A 1722 12 5 - - AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150624_070231 .

Leading Errors

Error (10346): VHDL error at Rx.vhd(1625): formal port or parameter "top_outLiveLayers" must have actual or default value File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.vhd Line: 1625
Error (10784): HDL error at DOSpyBuffers.vhdl(60): see declaration for object "top_outLiveLayers" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/spybuffers/DOSpyBuffers.vhdl Line: 60
Error (293001): Quartus II Full Compilation was unsuccessful. 4 errors, 12 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit 550cde79611c68c3c124677cce976e1c46ca5e49
Author: Jordan Webster
Date: Tue Jun 23 17:45:14 2015 -0700

  fixed the LiveLayers typo in DO


commit b4f07514a735cf710098899f3f86624d2f84e8ac
Author: jwebster
Date: Tue Jun 23 16:05:33 2015 -0500

  * updated DOSpyBuffers to include Live Layers
  * shortened sector ID in spy buffers from 16 bits to 13 bits and moved position of layermap
  * Updated TB run script to dump waveform output files, wlf & do

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-23 07:00:11 6:07:05 b0ea31e 5e26926 F2 00 4E 54980 324 0 124.5 MHz/100.0 MHz 112.35 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150623_130716 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 127,054 / 190,240 ( 67 % )
Total registers 245797
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.568 TFBlock:inst7|Tra...onsts[0][10][13]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct3_outconsts[0][10][13] TFBlock:inst7|Tra...onsts[0][10][13]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctCombiner:COMBINER|consts[0][10][13]
2 -0.503 TFBlock:inst7|Tra...consts[5][2][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[5][2][16] TFBlock:inst7|Tra...RTADATAINREGOUT0TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFGenericConstArrShiftRegister:gen_GuessedHitConstantShiftRegisters:5:CONSTSR|TFGenericShiftRegister:SHIFTREG|altshift_taps:gen_SHIFTREGISTERS:2:ASHIFTREG|shift_taps_ek41:auto_generated|dpram_ufn1:dpram2|lutrama12~OBSERVABLEPORTADATAINREGOUT0
3 -0.470 TFBlock:inst7|Tra...ts_reg1[1][1][6]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|consts_reg1[1][1][6] TFBlock:inst7|Tra...nconsts[1][1][6]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|partial_inconsts[1][1][6]
4 -0.453 TFBlock:inst7|Tra...onst_5_out[4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_5_out[4][5] TFBlock:inst7|Tra...s_dup1[5][10][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[5][10][5]
5 -0.415 TFBlock:inst7|Tra...tpartials[1][14]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:5:ACHIPARTIALCALC|outpartials[1][14] TFBlock:inst7|Tra...rtials[1][5][14]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|outpartials[1][5][14]

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-22 07:00:56 5:56:00 b0ea31e 5e26926 F2 00 4E 54980 324 0 124.5 MHz/100.0 MHz 112.35 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150622_125656 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 127,054 / 190,240 ( 67 % )
Total registers 245797
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.568 TFBlock:inst7|Tra...onsts[0][10][13]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct3_outconsts[0][10][13] TFBlock:inst7|Tra...onsts[0][10][13]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctCombiner:COMBINER|consts[0][10][13]
2 -0.503 TFBlock:inst7|Tra...consts[5][2][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[5][2][16] TFBlock:inst7|Tra...RTADATAINREGOUT0TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFGenericConstArrShiftRegister:gen_GuessedHitConstantShiftRegisters:5:CONSTSR|TFGenericShiftRegister:SHIFTREG|altshift_taps:gen_SHIFTREGISTERS:2:ASHIFTREG|shift_taps_ek41:auto_generated|dpram_ufn1:dpram2|lutrama12~OBSERVABLEPORTADATAINREGOUT0
3 -0.470 TFBlock:inst7|Tra...ts_reg1[1][1][6]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|consts_reg1[1][1][6] TFBlock:inst7|Tra...nconsts[1][1][6]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|partial_inconsts[1][1][6]
4 -0.453 TFBlock:inst7|Tra...onst_5_out[4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_5_out[4][5] TFBlock:inst7|Tra...s_dup1[5][10][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[5][10][5]
5 -0.415 TFBlock:inst7|Tra...tpartials[1][14]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:5:ACHIPARTIALCALC|outpartials[1][14] TFBlock:inst7|Tra...rtials[1][5][14]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|outpartials[1][5][14]

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-21 07:00:59 5:53:59 b0ea31e 5e26926 F2 00 4F 54980 324 0 124.5 MHz/100.0 MHz 112.35 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150621_125458 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 127,054 / 190,240 ( 67 % )
Total registers 245797
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.568 TFBlock:inst7|Tra...onsts[0][10][13]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct3_outconsts[0][10][13] TFBlock:inst7|Tra...onsts[0][10][13]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctCombiner:COMBINER|consts[0][10][13]
2 -0.503 TFBlock:inst7|Tra...consts[5][2][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[5][2][16] TFBlock:inst7|Tra...RTADATAINREGOUT0TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFGenericConstArrShiftRegister:gen_GuessedHitConstantShiftRegisters:5:CONSTSR|TFGenericShiftRegister:SHIFTREG|altshift_taps:gen_SHIFTREGISTERS:2:ASHIFTREG|shift_taps_ek41:auto_generated|dpram_ufn1:dpram2|lutrama12~OBSERVABLEPORTADATAINREGOUT0
3 -0.470 TFBlock:inst7|Tra...ts_reg1[1][1][6]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|consts_reg1[1][1][6] TFBlock:inst7|Tra...nconsts[1][1][6]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|partial_inconsts[1][1][6]
4 -0.453 TFBlock:inst7|Tra...onst_5_out[4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_5_out[4][5] TFBlock:inst7|Tra...s_dup1[5][10][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[5][10][5]
5 -0.415 TFBlock:inst7|Tra...tpartials[1][14]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:5:ACHIPARTIALCALC|outpartials[1][14] TFBlock:inst7|Tra...rtials[1][5][14]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|outpartials[1][5][14]

Processor Git Logs


commit b0ea31e40c33a115b76a45fe9793180ed1cffda7
Merge: 2126c76 424e6cc
Author: John Alison
Date: Sun Jun 21 07:36:10 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030


commit 424e6cc647c622cad3a3cc80bea550fbc95cb159
Author: John Alison
Date: Sun Jun 21 13:36:16 2015 +0200

  Duplicating more TF registers

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-20 07:00:40 6:28:16 74f9648 5e26926 F2 00 4E 54970 324 0 134.92 MHz/100.0 MHz 109.35 MHz/120.0 MHz AUTO
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150620_132856 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 126,970 / 190,240 ( 67 % )
Total registers 244397
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.812 TFBlock:inst7|Tra...hisquare_out[19]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomLayerOrganizer:LAYERORGANIZER|chisquare_out[19] TFBlock:inst7|Tra...rta_datain_reg26TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFFitFIFO:FITFIFO|fifo_256x256_128:FIFO|scfifo:scfifo_component|scfifo_ogh1:auto_generated|a_dpfifo_7ge1:dpfifo|altsyncram_e2m1:FIFOram|ram_block1a14~porta_datain_reg26
2 -0.802 FIFOMonitor:FIFOM..._mon_word_reg[3]FIFOMonitor:FIFOMonitor_inst|FIFOWordMonitor:do_roadID_fifowordmon_inst|fifo_mon_word_reg[3] FIFOMonitor:FIFOM...inst|word_reg[3]FIFOMonitor:FIFOMonitor_inst|FIFOWordMonitor:do_roadID_fifowordmon_inst|freeze_latch:fifo_mon_word_latch_inst|word_reg[3]
3 -0.627 DOEMIF:inst39|Roa...SIDs[6][11]~reg0DOEMIF:inst39|RoadProcessorEMIF:RoadProcessor_inst|SSIDs[6][11]~reg0 DOEMIF:inst39|DOS...oad_SSID_reg[11]DOEMIF:inst39|DOSCTLayer:GenSCTLayers:0:SCTLayer|road_SSID_reg[11]
4 -0.505 TFBlock:inst7|Tra..._consts[5][9][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[5][9][1] TFBlock:inst7|Tra...RTADATAINREGOUT0TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFGenericConstArrShiftRegister:gen_GuessedHitConstantShiftRegisters:5:CONSTSR|TFGenericShiftRegister:SHIFTREG|altshift_taps:gen_SHIFTREGISTERS:8:ASHIFTREG|shift_taps_ek41:auto_generated|dpram_ufn1:dpram2|lutrama3~OBSERVABLEPORTADATAINREGOUT0
5 -0.479 TFBlock:inst7|Tra...LC|outchis[4][3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER0|TFPixFitter:PIXFITTER|TFPixRecCalculator:PIXRECCALC|TFPixGuessedChiCalculator:GUESSEDCHICALC|outchis[4][3] TFBlock:inst7|Tra...data_out_wire[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER0|TFPixFitter:PIXFITTER|TFPixChiSquareCalculator:CHISQUARECALC|TFChiSquareCalculator:CHISQUARECALC|altmult_add_27x1x54:MULT4|altmult_add_27x1x54_mult_add_jho3:altmult_add_27x1x54_mult_add_jho3_component|altera_mult_add:altera_mult_add1|altera_mult_add_e66g:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[3]

Processor Git Logs


commit 74f9648de8673baa0048564d2c4ec9cb692e53e4
Author: jwebste2
Date: Fri Jun 19 16:05:55 2015 -0500

  updated nightly compile script


commit d77dd035e78d6ac25c3284a702c96cc9af48c4b3
Author: jwebste2
Date: Fri Jun 19 11:33:48 2015 -0500

  updated nightly scripts

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-19 07:00:02 4:53:43 771ba18 5e26926 F2 00 4E 54696 325 0 124.32 MHz/100.0 MHz 118.76 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150619_115345 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 125,677 / 190,240 ( 66 % )
Total registers 244390
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 771ba18f6632802ff5785640080c93d1940f0952
Author: jwebster
Date: Thu Jun 18 12:23:08 2015 -0500

  nightly compile scripts


commit ae7993cf22664900fc7bdd42478db9eae038b315
Author: jwebster
Date: Thu Jun 18 12:19:20 2015 -0500

  typo in nightly script

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-18 07:00:26 4:53:19 251ae51 5e26926 F2 00 4E 54696 325 0 124.32 MHz/100.0 MHz 118.76 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150618_115345 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 125,677 / 190,240 ( 66 % )
Total registers 244390
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 251ae51b9e8c16cca3383d84ca59aa952127bbff
Merge: 137fa0b c6a09d2
Author: Jordan Webster
Date: Tue Jun 16 16:34:31 2015 -0700

  Merge branch 'Jordan'


commit c6a09d24a35da4fbb37382514d5ba57cf7b94777
Author: Jordan Webster
Date: Tue Jun 16 16:17:45 2015 -0700

  updated waves for TF road record types

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-17 07:00:02 5:22:01 251ae51 5e26926 F2 00 4E 54664 325 0 123.87 MHz/100.0 MHz 108.66 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150617_122203 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 125,639 / 190,240 ( 66 % )
Total registers 244754
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,588,681 / 24,719,360 ( 51 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.870 DOEMIF:inst39|DOP..._out_hit[8]~reg0DOEMIF:inst39|DOPixelLayer:GenPixelLayers:1:PixLayer|pix_out_hit[8]~reg0 DOSpyBuffers:DOSp...pixhit_reg[1][8]DOSpyBuffers:DOSpyBuffers_inst|top_hlm11L_outpixhit_reg[1][8]
2 -0.507 TFBlock:inst7|Tra...consts[1][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctCombiner:COMBINER|consts[1][3][16] TFBlock:inst7|Tra...s_reg1[1][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|consts_reg1[1][3][16]
3 -0.397 TFBlock:inst7|Tra...pixlayers[0][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomLayerOrganizer:LAYERORGANIZER|outpixlayers[0][16] TFBlock:inst7|Tra...orta_datain_reg6TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFFitFIFO:FITFIFO|fifo_256x256_128:FIFO|scfifo:scfifo_component|scfifo_ogh1:auto_generated|a_dpfifo_7ge1:dpfifo|altsyncram_e2m1:FIFOram|ram_block1a12~porta_datain_reg6
4 -0.346 TFBlock:inst7|Tra...tsctlayers[3][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomLayerOrganizer:LAYERORGANIZER|outsctlayers[3][4] TFBlock:inst7|Tra...rta_datain_reg27TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFFitFIFO:FITFIFO|fifo_256x256_128:FIFO|scfifo:scfifo_component|scfifo_ogh1:auto_generated|a_dpfifo_7ge1:dpfifo|altsyncram_e2m1:FIFOram|ram_block1a0~porta_datain_reg27
5 -0.313 TFBlock:inst7|Tra...tcols_dup0[0][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outsctcols_dup0[0][4] TFBlock:inst7|Tra...data_out_wire[4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|altera_mult_add_18signedx11unsignedx1_31:SCTMULT0|altera_mult_add:altera_mult_add_18signedx11unsignedx1_31_inst|altera_mult_add_biec:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[4]

Processor Git Logs


commit 251ae51b9e8c16cca3383d84ca59aa952127bbff
Merge: 137fa0b c6a09d2
Author: Jordan Webster
Date: Tue Jun 16 16:34:31 2015 -0700

  Merge branch 'Jordan'


commit c6a09d24a35da4fbb37382514d5ba57cf7b94777
Author: Jordan Webster
Date: Tue Jun 16 16:17:45 2015 -0700

  updated waves for TF road record types

AUXCommon Git Logs


commit 35e2692639b4311c9c8cd89f484da170d9c80e5b
Author: Karol Krizka
Date: Tue Jun 16 16:45:45 2015 +0200

  Updated ssmap compile.do to get ssmap testbench to work.


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor

2015-06-16 07:00:24 0:00:35 2468a04 8a74633 N/A 1719 12 4 - - FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150616_070059 .

Leading Errors

Error (10481): VHDL Use Clause error at hlcreadsct.vhd(161): design library "work" does not contain primary unit "DCIndexROM" File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/MergedDO/project/hlcreadsct.vhd Line: 161
Error (293001): Quartus II Full Compilation was unsuccessful. 3 errors, 12 warnings
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit 2468a04f311c98f181c37eb974c2d9df354789ab
Merge: 3930cca b14f0e8
Author: unknown
Date: Mon Jun 15 16:32:21 2015 -0700

  Merge remote-tracking branch 'origin/master' into NewDCFlagMap

  Conflicts:
  Rx_EMIF/Rx.qsf
  combined_testbench/compileTF.do


commit 3930cca9f6592df279ed403b6402fe5dfdf26965
Author: unknown
Date: Mon Jun 15 16:29:15 2015 -0700

  looping in EMIF as well and all projects comile. merging

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-15 07:00:35 4:51:57 b14f0e8 8a74633 F2 00 4C 54575 410 0 119.57 MHz/100.0 MHz 112.61 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150615_115232 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 117,120 / 190,240 ( 62 % )
Total registers 243839
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,920,201 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.547 TFBlock:inst7|Tra...consts[5][5][11]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct3_outconsts[5][5][11] TFBlock:inst7|Tra...consts[5][5][11]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctCombiner:COMBINER|consts[5][5][11]
2 -0.504 TFBlock:inst7|Tra...generated|dffe41TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER0|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:5:ACHICALC|parallel_add_33x4_35:ADDER|parallel_add:parallel_add_component|par_add_hre:auto_generated|dffe41 TFBlock:inst7|Tra...generated|dffe42TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER0|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:5:ACHICALC|parallel_add_33x4_35:ADDER|parallel_add:parallel_add_component|par_add_hre:auto_generated|dffe42
3 -0.491 TFBlock:inst7|Tra...|consts[4][2][9]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctCombiner:COMBINER|consts[4][2][9] TFBlock:inst7|Tra...ts_reg1[4][2][9]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|consts_reg1[4][2][9]
4 -0.264 TFBlock:inst7|Tra..._consts[2][5][8]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|reg3_consts[2][5][8] TFBlock:inst7|Tra...tconsts[2][5][8]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct3_outconsts[2][5][8]
5 -0.241 TFBlock:inst7|Tra...plicate[5][5][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts_duplicate[5][5][1] TFBlock:inst7|Tra...ts_dup1[5][5][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[5][5][1]

Processor Git Logs


commit b14f0e8d7ffe11a233bc97fea5a5954a39d99ee5
Author: John Alison
Date: Sun Jun 14 15:11:22 2015 +0200

  Updates to the latency to match the chi2


commit 0313f9ef396c612f0e88d34aa4ca66b4439812a7
Author: John Alison
Date: Sun Jun 14 14:40:46 2015 +0200

  Add fanout

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-14 07:00:46 4:20:58 c5178a2 8a74633 F2 00 4C 54571 410 0 121.46 MHz/100.0 MHz 126.06 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150614_112144 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 113,951 / 190,240 ( 60 % )
Total registers 230173
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,920,319 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit c5178a29264f669246ec94237617d390f4fb7534
Author: John Alison
Date: Sat Jun 13 04:25:56 2015 -0400

  Bring in changes from pushing timing


commit f5a890edb8cb9e307dfe5d05ecbc6ce981296420
Author: John Alison
Date: Sat Jun 13 04:18:13 2015 -0400

  Valdated Sim

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-13 07:00:39 4:22:12 c5178a2 8a74633 F2 00 4C 54571 410 0 121.46 MHz/100.0 MHz 126.06 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150613_112251 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 113,951 / 190,240 ( 60 % )
Total registers 230173
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,920,319 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit c5178a29264f669246ec94237617d390f4fb7534
Author: John Alison
Date: Sat Jun 13 04:25:56 2015 -0400

  Bring in changes from pushing timing


commit f5a890edb8cb9e307dfe5d05ecbc6ce981296420
Author: John Alison
Date: Sat Jun 13 04:18:13 2015 -0400

  Valdated Sim

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-12 07:01:08 5:07:07 94e6851 8a74633 F2 00 4C 54413 410 0 130.89 MHz/100.0 MHz 106.73 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150612_120815 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,948 / 190,240 ( 61 % )
Total registers 240993
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,905,170 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -1.036 TFBlock:inst7|Tra...consts[1][5][15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[1][5][15] TFBlock:inst7|Tra...consts[1][5][15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[1][5][15]
2 -0.933 TFBlock:inst7|Tra...nst_0_out[2][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_0_out[2][17] TFBlock:inst7|Tra...s_dup0[0][8][17]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup0[0][8][17]
3 -0.858 TFBlock:inst7|Tra...tconsts[4][3][9]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[4][3][9] TFBlock:inst7|Tra...|consts[4][3][9]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[4][3][9]
4 -0.810 TFBlock:inst7|Tra...consts[5][2][10]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[5][2][10] TFBlock:inst7|Tra...consts[5][2][10]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[5][2][10]
5 -0.752 TFBlock:inst7|Tra...rows_dup1[0][11]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFGenericCoordExtractor:EXTRACTOR|outpixrows_dup1[0][11] TFBlock:inst7|Tra...ata_out_wire[12]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:1:ACHIPARTIALCALC|altera_mult_add_18signedx13unsignedx2_32:PIXMULT0|altera_mult_add:altera_mult_add_18signedx13unsignedx2_32_inst|altera_mult_add_55dc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:datab_split|ama_register_function:data_register_block_0|data_out_wire[12]

Processor Git Logs


commit 94e68519ec9e7986d2bf0a608cff6f74f9afa2db
Merge: 93f3ae2 414f714
Author: jwebster
Date: Thu Jun 11 11:49:52 2015 -0500

  Merge branch 'master' of Y:\FTK\Processor_1_20141030


commit 414f714ab9f30dc915a4320b681432b779f4b101
Author: Karol Krizka
Date: Thu Jun 11 11:14:02 2015 +0200

  Delay output layermaps in TFNomFitter to make them synchronous with chi2 output.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-11 07:00:35 4:59:39 414f714 8a74633 F2 00 4C 54386 410 0 107.41 MHz/100.0 MHz 112.6 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150611_120014 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,954 / 190,240 ( 61 % )
Total registers 240601
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.548 TFBlock:inst7|Tra...nconsts[4][2][2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|partial_inconsts[4][2][2] TFBlock:inst7|Tra...data_out_wire[2]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:4:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixRows|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_1|data_out_wire[2]
2 -0.382 TFBlock:inst7|Tra...tpartials[1][26]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:2:ACHIPARTIALCALC|outpartials[1][26] TFBlock:inst7|Tra...rtials[1][2][26]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|outpartials[1][2][26]
3 -0.290 TFBlock:inst7|Tra...nconsts[1][3][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|partial_inconsts[1][3][5] TFBlock:inst7|Tra...data_out_wire[5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:1:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixCols|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_1|data_out_wire[5]
4 -0.117 TFBlock:inst7|Tra...generated|dffe51TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|parallel_add_33x8_36:SCTADDER3|parallel_add:parallel_add_component|par_add_mre:auto_generated|dffe51 TFBlock:inst7|Tra...generated|dffe52TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:0:ACHIPARTIALCALC|parallel_add_33x8_36:SCTADDER3|parallel_add:parallel_add_component|par_add_mre:auto_generated|dffe52
5 -0.079 TFBlock:inst7|Tra...enerated|dffe111TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:4:ACHIPARTIALCALC|parallel_add_33x8_36:SCTADDER3|parallel_add:parallel_add_component|par_add_mre:auto_generated|dffe111 TFBlock:inst7|Tra...enerated|dffe112TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFFullChiPartialCalculator:CHICALC|TFChiPartialCalculator:gen_PartialCalculators:4:ACHIPARTIALCALC|parallel_add_33x8_36:SCTADDER3|parallel_add:parallel_add_component|par_add_mre:auto_generated|dffe112

Processor Git Logs


commit 414f714ab9f30dc915a4320b681432b779f4b101
Author: Karol Krizka
Date: Thu Jun 11 11:14:02 2015 +0200

  Delay output layermaps in TFNomFitter to make them synchronous with chi2 output.


commit 1fc70c226377a0ee8ea18303dfb1e22ca0035005
Author: Karol Krizka
Date: Thu Jun 11 11:13:37 2015 +0200

  Added shiftreg_20x62 to QSFs.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-10 07:06:04 4:49:14 52f1a1c 8a74633 F2 00 4C 54392 410 0 131.53 MHz/100.0 MHz 109.48 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150610_115518 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,955 / 190,240 ( 61 % )
Total registers 241529
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.801 TFBlock:inst7|Tra...tconsts[0][4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct2_outconsts[0][4][5] TFBlock:inst7|Tra...|consts[0][4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctCombiner:COMBINER|consts[0][4][5]
2 -0.758 TFBlock:inst7|Tra...consts[2][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|reg1_consts[2][3][16] TFBlock:inst7|Tra...consts[2][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[2][3][16]
3 -0.720 TFBlock:inst7|Tra...consts[1][3][15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctFitter:SCTFITTER|partial_inconsts[1][3][15] TFBlock:inst7|Tra...ata_out_wire[15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:1:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixCols|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_1|data_out_wire[15]
4 -0.571 TFBlock:inst7|Tra...consts[0][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|partial_inconsts[0][3][16] TFBlock:inst7|Tra...ata_out_wire[16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:0:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixCols|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_1|data_out_wire[16]
5 -0.529 TFBlock:inst7|Tra...tconsts[1][0][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[1][0][1] TFBlock:inst7|Tra...|consts[1][0][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[1][0][1]

Processor Git Logs


commit 52f1a1c793f4f258dd78d7cc3264fa90c97805f4
Author: Karol Krizka
Date: Wed Jun 10 11:20:47 2015 +0200

  Updates to TF loading in run_MergedDOLoop.


commit 5f6a79c03471b4d0b9935dd999d66c8536141369
Author: Karol Krizka
Date: Wed Jun 10 11:18:20 2015 +0200

  Updates to TF waves files in combined_testbench.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-09 07:00:40 4:56:28 983c302 8a74633 F2 00 4C 54392 410 0 131.53 MHz/100.0 MHz 109.48 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150609_115708 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,955 / 190,240 ( 61 % )
Total registers 241529
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.801 TFBlock:inst7|Tra...tconsts[0][4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct2_outconsts[0][4][5] TFBlock:inst7|Tra...|consts[0][4][5]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctCombiner:COMBINER|consts[0][4][5]
2 -0.758 TFBlock:inst7|Tra...consts[2][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|reg1_consts[2][3][16] TFBlock:inst7|Tra...consts[2][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[2][3][16]
3 -0.720 TFBlock:inst7|Tra...consts[1][3][15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctFitter:SCTFITTER|partial_inconsts[1][3][15] TFBlock:inst7|Tra...ata_out_wire[15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:1:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixCols|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_1|data_out_wire[15]
4 -0.571 TFBlock:inst7|Tra...consts[0][3][16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|partial_inconsts[0][3][16] TFBlock:inst7|Tra...ata_out_wire[16]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER2|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:0:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixCols|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_1|data_out_wire[16]
5 -0.529 TFBlock:inst7|Tra...tconsts[1][0][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|sct1_outconsts[1][0][1] TFBlock:inst7|Tra...|consts[1][0][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctCombiner:COMBINER|consts[1][0][1]

Processor Git Logs


commit 983c302a638342a01a7c8891b1920ce4fcea1149
Author: Karol Krizka
Date: Tue Jun 9 11:43:25 2015 +0200

  Fixed typo in TFRoadSynchronizer to get it to compile.


commit c80b123e480c7e57594429e23530bee0addae55e
Author: Karol Krizka
Date: Tue Jun 9 11:33:08 2015 +0200

  Fixed roads with ID 0 comming out of buffer logic.

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-08 07:00:43 4:09:27 955880d 8a74633 F2 00 4C 54387 410 0 128.32 MHz/100.0 MHz 123.93 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150608_111010 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,971 / 190,240 ( 61 % )
Total registers 241176
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-07 07:00:34 4:16:25 955880d 8a74633 F2 00 4C 54387 410 0 128.32 MHz/100.0 MHz 123.93 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150607_111659 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,971 / 190,240 ( 61 % )
Total registers 241176
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-06 07:00:53 4:09:13 955880d 8a74633 F2 00 4C 54387 410 0 128.32 MHz/100.0 MHz 123.93 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150606_111006 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,971 / 190,240 ( 61 % )
Total registers 241176
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-05 07:00:31 4:06:48 955880d 8a74633 F2 00 4C 54387 410 0 128.32 MHz/100.0 MHz 123.93 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150605_110719 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,971 / 190,240 ( 61 % )
Total registers 241176
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,188 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 955880d2146344ecd2554d90e65b39d4ebd13d65
Author: jwebster
Date: Thu Jun 4 11:50:42 2015 -0500

  updated nightly run script for generating html


commit ad804a530f4fd3f89e897e2622b6978fe11277bd
Author: jwebster
Date: Thu Jun 4 11:48:27 2015 -0500

  updated compile script to checkout before pulling

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-04 07:00:47 4:13:15 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150604_111402 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-03 07:00:17 3:52:47 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150603_105304 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-02 07:00:52 3:52:10 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150602_105302 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-06-01 07:00:33 3:51:34 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150601_105207 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-31 07:00:42 3:53:27 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150531_105409 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-30 07:00:38 3:52:36 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150530_105314 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-29 07:00:49 3:51:23 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150529_105212 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-28 07:00:36 3:53:26 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150528_105402 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-27 07:00:50 3:51:49 e899ea5 8a74633 F2 00 4C 54198 394 0 133.23 MHz/100.0 MHz 114.53 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150527_105239 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 115,013 / 190,240 ( 60 % )
Total registers 235941
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,897,221 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.398 DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff DOEMIF:inst39|DOP...dpfifo|empty_dffDOEMIF:inst39|DOPixelLayer:GenPixelLayers:3:PixLayer|hlcreadpix:PixReadModule|PIXFIFOSS3:FIFO_fullSS3|scfifo:scfifo_component|scfifo_qkh1:auto_generated|a_dpfifo_vle1:dpfifo|empty_dff
2 -0.322 TFBlock:inst7|Tra...onst_1_out[4][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_1_out[4][4] TFBlock:inst7|Tra...s_dup1[1][10][4]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|inconsts_dup1[1][10][4]
3 -0.313 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[33]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[33]
4 -0.312 TFBlock:inst7|Tra...unter_reg_bit[3]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|TFRecFitterOutputShiftRegister:RECOUTPUTSR|shiftreg_20x18:gen_SHIFTREGISTERS:0:ASHIFTREG|altshift_taps:ALTSHIFT_TAPS_component|shift_taps_e351:auto_generated|cntr_jcf:cntr1|counter_reg_bit[3] TFBlock:inst7|Tra...uare_out_int[30]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomFitter:NOMFITTER|chisquare_out_int[30]
5 -0.270 TFBlock:inst7|Tra...tconsts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|outconsts[4][4][1] TFBlock:inst7|Tra..._consts[4][4][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFNomFitterBlock:NOMFITTER|TFNomCombiner:COMBINER|sr_consts[4][4][1]

Processor Git Logs


commit e899ea59c83f690d4c1cd7d70c303a824840b432
Author: John Alison
Date: Tue May 26 17:48:00 2015 -0400

  Quick bug fixes


commit e45eb723ec14f5268fa6512c97bd77199a1b5270
Merge: 13648d4 f0bca2d
Author: John Alison
Date: Tue May 26 17:41:19 2015 -0400

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit f8a7463380c301720effb2e514a58067a520adf5
Author: John Alison
Date: Tue May 26 11:26:52 2015 -0400

  Bug fix to FIFOWordMonitor


commit 3d6b8d092be673637e0bb3c227d702f1536d9f00
Author: John Alison
Date: Tue May 26 11:18:28 2015 -0400

  Registering input of FIFOWordMon

2015-05-26 07:00:01 4:10:17 c496f5c caea3fb F2 00 4C 54197 395 0 127.49 MHz/100.0 MHz 108.9 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150526_111018 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 113,605 / 190,240 ( 60 % )
Total registers 230659
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,896,197 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.850 RxBlock:RxBlock_i...:fifo_ram|q_b[5]RxBlock:RxBlock_inst|Xcvr_Hits:xcvr3_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|dcfifo:fifo_inst|dcfifo_5lm1:auto_generated|altsyncram_ul91:fifo_ram|q_b[5] RxBlock:RxBlock_i...|LD[5]~DUPLICATERxBlock:RxBlock_inst|Xcvr_Hits:xcvr3_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|LD[5]~DUPLICATE
2 -0.845 RxBlock:RxBlock_i...:fifo_ram|q_b[5]RxBlock:RxBlock_inst|Xcvr_Hits:xcvr3_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|dcfifo:fifo_inst|dcfifo_5lm1:auto_generated|altsyncram_ul91:fifo_ram|q_b[5] RxBlock:RxBlock_i...1:ldc_inst|LD[5]RxBlock:RxBlock_inst|Xcvr_Hits:xcvr3_inst|SimpleSimplexLDC:gen_slink:1:ldc_inst|LD[5]
3 -0.794 TFBlock:inst7|Tra...s_reg1[0][10][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixFitter:PIXFITTER|consts_reg1[0][10][1] TFBlock:inst7|Tra...inconsts_1[0][1]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixFitter:PIXFITTER|sr_inconsts_1[0][1]
4 -0.775 RxMonitor:RxMonit..._inst|monitor[8]RxMonitor:RxMonitor_inst|XcvrGroupMonitor:rx_mon|FIFOWordMonitor:gen_mon:8:fifomon_inst|monitor[8] RxMonitor:RxMonit..._inst|monitor[8]RxMonitor:RxMonitor_inst|XcvrGroupMonitor:rx_mon|XcvrMonitor:gen_mon:8:mux_inst|monitor[8]
5 -0.727 TFBlock:inst7|Tra...enerated|dffe131TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixFitter:PIXFITTER|TFPixFullPartialCalculator:CHICALCULATOR|TFPixPartialCalculator:gen_PartialCalculators:0:ACHICALC|parallel_add_33x3_35:ADDER|parallel_add:parallel_add_component|par_add_gre:auto_generated|dffe131 TFBlock:inst7|Tra...enerated|dffe132TFBlock:inst7|TrackFitter:ATRACKFITTER|TFPixFitterBlock:PIXFITTER1|TFPixFitter:PIXFITTER|TFPixFullPartialCalculator:CHICALCULATOR|TFPixPartialCalculator:gen_PartialCalculators:0:ACHICALC|parallel_add_33x3_35:ADDER|parallel_add:parallel_add_component|par_add_gre:auto_generated|dffe132

Processor Git Logs


commit c496f5cc71930e7eb769c4f0b61c19c86a28ecdd
Author: unknown
Date: Mon May 25 19:28:57 2015 -0700

  fixing RoadProcessor without EMIF to work with calibration success checking


commit 2cc96cde8a5f922073369b789173663351425956
Merge: 098d4ed 1dd5d2c
Author: unknown
Date: Mon May 25 13:17:30 2015 -0700

  Merge remote-tracking branch 'origin/master'

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-25 07:00:01 0:00:46 df20913 caea3fb N/A 1 0 5 - - FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150525_070047 .

Leading Errors

Error (125048): Error reading Quartus II Settings File C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.qsf, line 1690 File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.qsf Line: 1690
Error (125080): Can't open project -- Quartus II Settings File contains one or more errors
Error (23031): Evaluation of Tcl script c:/altera/13.1/quartus/common/tcl/internal/qsh_flow.tcl unsuccessful
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit df209137fc23835ad7980541ad18539681003c2f
Author: John Alison
Date: Sat May 23 15:32:14 2015 -0400

  Bug fixing'


commit b837d788aaec7dd2e830ef853da8799dd8bad9d8
Author: John Alison
Date: Sat May 23 14:28:23 2015 -0400

  Updating types for reg duplication

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-24 07:00:00 0:00:46 df20913 caea3fb N/A 1 0 5 - - FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150524_070046 .

Leading Errors

Error (125048): Error reading Quartus II Settings File C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.qsf, line 1690 File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.qsf Line: 1690
Error (125080): Can't open project -- Quartus II Settings File contains one or more errors
Error (23031): Evaluation of Tcl script c:/altera/13.1/quartus/common/tcl/internal/qsh_flow.tcl unsuccessful
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit df209137fc23835ad7980541ad18539681003c2f
Author: John Alison
Date: Sat May 23 15:32:14 2015 -0400

  Bug fixing'


commit b837d788aaec7dd2e830ef853da8799dd8bad9d8
Author: John Alison
Date: Sat May 23 14:28:23 2015 -0400

  Updating types for reg duplication

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-23 07:00:41 0:00:47 07726fa caea3fb N/A 1 0 5 - - FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150523_070128 .

Leading Errors

Error (125048): Error reading Quartus II Settings File C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.qsf, line 1690 File: C:/Users/jswebster/Desktop/stable/Processor_1_20141030/Rx_EMIF/Rx.qsf Line: 1690
Error (125080): Can't open project -- Quartus II Settings File contains one or more errors
Error (23031): Evaluation of Tcl script c:/altera/13.1/quartus/common/tcl/internal/qsh_flow.tcl unsuccessful
Error (213009): File name "Rx.sof" does not exist
Error (213009): File name "Rx_EMIF.pof" does not exist

Processor Git Logs


commit 07726fab89e1db23051bfa0ddc7dd06f32c20828
Author: John Alison
Date: Fri May 22 17:55:18 2015 -0400

  Updating assignment editor


commit eef1e2e278e696145fe58e20947561d926805088
Author: John Alison
Date: Fri May 22 15:32:10 2015 -0400

  Adding pipelinning to TFRoadSynchron

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-22 07:00:19 3:11:40 df7037b caea3fb F2 00 4C 55070 360 0 131.42 MHz/100.0 MHz 124.63 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150522_101159 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 103,140 / 190,240 ( 54 % )
Total registers 181156
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,939,776 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit df7037bcac3a8f382231a83d62e5d266f2462959
Author: John Alison
Date: Thu May 21 17:46:41 2015 -0400

  Bug fixes


commit 678aeda869940ddad456b623047485a0b411165a
Author: John Alison
Date: Thu May 21 17:37:42 2015 -0400

  Register and pipeline TF SpyBuffers

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-21 07:00:33 3:18:52 a75150f caea3fb F2 00 4C 55063 359 0 129.17 MHz/100.0 MHz 125.61 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150521_101925 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 102,257 / 190,240 ( 54 % )
Total registers 178324
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,939,772 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit a75150f0adc066865556776bc6dec73c6da9e09b
Author: John Alison
Date: Thu May 21 01:21:16 2015 -0400

  Fix for Debug_EMIF to compile


commit 151d62e815d48241e8e54ad9cd62973678c9defc
Merge: 55fd268 89a43d0
Author: jwebster
Date: Wed May 20 14:27:29 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-20 07:00:33 3:10:39 55fd268 caea3fb F2 00 4A 55063 365 0 117.05 MHz/100.0 MHz 120.8 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150520_101112 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 102,383 / 190,240 ( 54 % )
Total registers 177109
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,939,772 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 55fd2685bce316aba5506cff57b787d3caee7440
Merge: 1fe60d2 2d6f4af
Author: jwebster
Date: Wed May 20 07:00:36 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 2d6f4af630a21e72c44e4db5f3816d052acf1141
Author: John Alison
Date: Wed May 20 07:13:17 2015 -0400

  Update DO Req logic in Debug projects

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-19 07:01:35 4:14:29 5cc631f caea3fb F2 00 48 55067 365 0 113.58 MHz/100.0 MHz 113.82 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150519_111604 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 102,176 / 190,240 ( 54 % )
Total registers 176784
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,939,775 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.453 RxMonitor:RxMonit..._inst|monitor[4]RxMonitor:RxMonitor_inst|XcvrGroupMonitor:rx_mon|FIFOWordMonitor:gen_mon:8:fifomon_inst|monitor[4] RxMonitor:RxMonit..._inst|monitor[4]RxMonitor:RxMonitor_inst|XcvrGroupMonitor:rx_mon|XcvrMonitor:gen_mon:8:mux_inst|monitor[4]
2 -0.427 TFBlock:inst7|Tra...nconsts[1][0][7]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|partial_inconsts[1][0][7] TFBlock:inst7|Tra...data_out_wire[7]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|TFSctFullPartialCalculator:CHICALCULATOR|TFSctPartialCalculator:gen_PartialCalculators:1:ACHICALC|altera_mult_add_18signedx12unsignedx3_32:MultPixRows|altera_mult_add:altera_mult_add_18signedx12unsignedx3_32_inst|altera_mult_add_rnbc:auto_generated|altera_mult_add_rtl:altera_mult_add_rtl1|ama_data_split_reg_ext_function:dataa_split|ama_register_function:data_register_block_0|data_out_wire[7]
3 -0.309 TFBlock:inst7|Tra...enerated|dffe227TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|TFSctChiSquareCalculator:CHISQUARECALC|TFChiSquareCalculator:CHISQUARECALC|parallel_add_54x6x57:ADDER|parallel_add:parallel_add_component|par_add_qre:auto_generated|dffe227 TFBlock:inst7|Tra...orta_datain_reg4TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER3|TFSctFitter:SCTFITTER|TFSctChiSquareCalculator:CHISQUARECALC|altshift_taps:chisquare_out_rtl_0|shift_taps_2ru:auto_generated|altsyncram_1r91:altsyncram5|ram_block6a16~porta_datain_reg4
4 -0.296 TFBlock:inst7|Tra...nst_0_out[4][15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUX:CONSTMEMMUX|special_sctconst_0_out[4][15] TFBlock:inst7|Tra...icate[0][10][15]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFConstantsMemoryBlock:CONSTANTSMEM|TFConstantsMemoryMUXSctFO:CONSTMEMSCTFANOUT|reg1_consts_duplicate[0][10][15]
5 -0.256 TFBlock:inst7|Tra...ts_reg1[3][0][8]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctFitter:SCTFITTER|consts_reg1[3][0][8] TFBlock:inst7|Tra...nconsts[3][0][8]TFBlock:inst7|TrackFitter:ATRACKFITTER|TFSctFitterBlock:SCTFITTER1|TFSctFitter:SCTFITTER|partial_inconsts[3][0][8]

Processor Git Logs


commit 5cc631f611e6db7e1138328baf037335fa7b7315
Merge: b9448c9 25a5db5
Author: jwebster
Date: Tue May 19 00:01:13 2015 -0500

  Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030


commit 25a5db516a14c29dd0430e6afda5f225a74266cd
Author: Jamie Saxon
Date: Mon May 18 23:32:32 2015 -0700

  duplicate bug

AUXCommon Git Logs


commit dcaea3fbed25b7af853bdc0af598b8623aa2b100
Author: John Alison
Date: Mon May 18 10:54:00 2015 -0400

  Adding duplicated registers


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.

2015-05-18 07:00:43 3:17:37 3311423 f4adf4e F2 00 48 55068 359 0 128.09 MHz/100.0 MHz 125.44 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150518_101820 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 109,141 / 190,240 ( 57 % )
Total registers 194919
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,936,079 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 331142308b5f30d4b1805d5c9175e721e54c9ba8
Author: John Alison
Date: Sat May 16 09:55:18 2015 -0400

  Compiled Rx_EMIF Black as coal at 120


commit e7c8727193004f06e3dcc5216de1a46fc9ca9444
Merge: bca9923 76d1fe7
Author: John Alison
Date: Fri May 15 15:13:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-17 07:00:21 3:17:30 3311423 f4adf4e F2 00 48 55074 359 0 128.09 MHz/100.0 MHz 125.44 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150517_101751 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 109,141 / 190,240 ( 57 % )
Total registers 194919
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,936,079 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Processor Git Logs


commit 331142308b5f30d4b1805d5c9175e721e54c9ba8
Author: John Alison
Date: Sat May 16 09:55:18 2015 -0400

  Compiled Rx_EMIF Black as coal at 120


commit e7c8727193004f06e3dcc5216de1a46fc9ca9444
Merge: bca9923 76d1fe7
Author: John Alison
Date: Fri May 15 15:13:56 2015 -0400

  Merge branch 'master' of eshop1:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-16 07:00:45 3:26:37 76d1fe7 f4adf4e F2 00 45 55065 360 0 130.48 MHz/100.0 MHz 118.81 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150516_102722 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 107,861 / 190,240 ( 57 % )
Total registers 189002
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,939,287 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

Top Failing Paths

Slack From To
1 -0.084 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...bit[8]~DUPLICATEDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[8]~DUPLICATE
2 -0.082 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...unter_reg_bit[5]DFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[5]
3 -0.081 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...unter_reg_bit[8]DFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[8]
4 -0.076 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...unter_reg_bit[3]DFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[3]
5 -0.071 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...bit[3]~DUPLICATEDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[3]~DUPLICATE

Processor Git Logs


commit 76d1fe734c5fb5231d137dfe1516c3a0bb2da10e
Author: Karol Krizka
Date: Fri May 15 09:37:26 2015 +0200

  Constants checksum now uses 10MHz clock.


commit a720bb129061bd6cd0f55e5a7bbf17760c48d84a
Author: John Alison
Date: Thu May 14 15:10:21 2015 -0400

  Duplicating more registers

AUXCommon Git Logs


commit 7f4adf4ed2a54d7d0ec86c9ffa78d845c054fc58
Author: Karol Krizka
Date: Tue May 12 09:27:17 2015 +0200

  Fix prbs_any by initializing first pattern to all 1.


commit b449093711a4cfa247e81e195606b7c49c7f3981
Author: Karol Krizka
Date: Fri May 1 17:38:16 2015 +0200

  Fixed XcvrGroupMonitor's non-sync-checked signal connections.

2015-05-15 07:00:25 3:26:00 76d1fe7 f4adf4e F2 00 45 55083 360 0 130.48 MHz/100.0 MHz 118.81 MHz/120.0 MHz FAST
Get files:
  scp -r ${USER}@eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Rx_EMIF_master_20150515_102625 .

Resource Usage Summary

Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
Revision Name Rx
Top-level Entity Name Rx
Family Arria V
Device 5AGXFB7H4F35C4
Timing Models Final
Logic utilization (in ALMs) 107,861 / 190,240 ( 57 % )
Total registers 189002
Total pins 247 / 656 ( 38 % )
Total virtual pins 0
Total block memory bits 12,939,287 / 24,719,360 ( 52 % )
Total DSP Blocks 599 / 1,156 ( 52 % )
Total HSSI RX PCSs 17 / 24 ( 71 % )
Total HSSI PMA RX Deserializers 17 / 24 ( 71 % )
Total HSSI TX PCSs 13 / 24 ( 54 % )
Total HSSI TX Channels 13 / 24 ( 54 % )
Total PLLs 2 / 40 ( 5 % )
Total DLLs 1 / 4 ( 25 % )

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1 -0.084 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...bit[8]~DUPLICATEDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[8]~DUPLICATE
2 -0.082 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...unter_reg_bit[5]DFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[5]
3 -0.081 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...unter_reg_bit[8]DFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[8]
4 -0.076 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFSynchronization...unter_reg_bit[3]DFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:0:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|a_fefifo_s7f:fifo_state|cntr_4a7:count_usedw|counter_reg_bit[3]
5 -0.071 DFSynchronization...WRITE_ENABLE_REGDFSynchronization:DFSynchronization_inst|AMBConverter:gen_ambroadcon:2:ambroadcon_inst|aux_scfifo:datafifo_inst|scfifo:fifo_inst|scfifo_7fc1:auto_generated|a_dpfifo_ie91:dpfifo|dpram_op61:FIFOram|altsyncram_e3q1:altsyncram1|ram_block2a12~PORT_B_WRITE_ENABLE_REG DFS