Name Ignored Entity Ignored From Ignored To Ignored Value Ignored Source
Synchronizer Identification RLDRAMII_p0_reset_sync   reset_reg[16] FORCED_IF_ASYNCHRONOUS Compiler or HDL Assignment
Global Signal RLDRAMII_p0_reset_sync   reset_reg[16] OFF Compiler or HDL Assignment
I/O Standard Rx   avl_write_req 3.0-V LVTTL QSF Assignment
I/O Standard Rx   datain_fromAMB[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   datain_fromAMB[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   datain_fromAMB[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   datain_fromAMB[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout1[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout1[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout1[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout1[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout2[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout2[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout2[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout2[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout3[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout3[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout3[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   dataout3[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   gen_datain(n) 1.5-V PCML QSF Assignment
I/O Standard Rx   gx_pll_refclkin1(n) 1.5-V PCML QSF Assignment
I/O Standard Rx   gx_pll_refclkin2(n) 1.5-V PCML QSF Assignment
I/O Standard Rx   gx_pll_refclkin3(n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain1[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain1[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain1[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain1[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain2[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain2[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain2[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain2[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain3[0](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain3[1](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain3[2](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   hitdatain3[3](n) 1.5-V PCML QSF Assignment
I/O Standard Rx   master_clock(n) LVDS QSF Assignment
I/O Standard Rx   mem_a 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_ba 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_cs_n 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_dk DIFFERENTIAL 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_dk_n DIFFERENTIAL 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_dq 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_qk DIFFERENTIAL 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   mem_qk_n DIFFERENTIAL 1.8-V HSTL CLASS I QSF Assignment
I/O Standard Rx   merge_dataout(n) 1.5-V PCML QSF Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[0].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[10].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[11].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[12].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[13].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[14].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[15].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[16].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[17].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[1].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[2].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[3].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[4].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[5].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[6].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[7].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[8].oe_reg on Compiler or HDL Assignment
Fast Output Enable Register altdq_dqs2_acv_arriav   output_path_gen[9].oe_reg on Compiler or HDL Assignment
Synchronizer Identification memctl_reset_sync   reset_reg[9] FORCED_IF_ASYNCHRONOUS Compiler or HDL Assignment
Global Signal memctl_reset_sync   reset_reg[9] OFF Compiler or HDL Assignment