March 3, 1999
Stray Capacitance In 3in1 CIS
University of Chicago
Stray capacitance in the 3in1 charge injection system (CIS) influences the absolute gain calibration. This effect has been measured. It is found that the stray capacitance in the high gain section (small capacitor) is 0.2± 0.1 pF, and in the low gain section (large capacitor) it is 0.1± 0.1 pF.
The CIS system is designed to allow online calibration of the 3in1 card. It uses 100 pF and 5 pF capacitors, either of which can be charged to a known voltage and discharged into the 3in1 input using an FET switch. The 100 pF capacitor is most useful for calibrating the low gain scale while the 5 pF capacitor is most useful for the high gain scale but either capacitor can be used with either scale.
The voltage applied to the capacitors is controlled by a common 10-bit DAC and voltage source. The total charge injected is determined by the magnitude of the capacitance and by the voltage. As the voltage is precisely controlled by the DAC, the accuracy of the injected charge is primarily determined by the accuracy of the capacitance, including the stray capacitance on the board. This is especially important when the 5 pF capacitor is used.
In order to measure the stray capacitance, we removed the both 5 pF and 100 pF calibration capacitors from the board.
Next, we put the 3in1 card on the test bench. First, we measured the parasitic charge injection by the FET switch. We operated the 3in1 card in calibration mode with an applied voltage of 0 volts. The output pulse was observed and recorded. We added a small, known capacitor to the stray capacitance and observed the output pulse again. No change was observed. Thus the signal at 0 volts is due to the switch alone and is not influenced by the external capacitance. The magnitude of this switch-associated signal is 10 mV on the high gain scale (1 V full scale).
Next, we measured the output signal associated with the stray capacitance. The small test capacitor mentioned above was removed and an arbitrary calibration voltage was applied. The output pulse amplitude was 18.8 mV, or 8.8 mV larger than from the switch alone.
Finally, we measured the signal with a known capacitor added to the stray capacitance. We add a 0.17 pF capacitor on the board in the form of two small parallel plates perpendicular to the board with an air gap of ~ 1 mm. The pulse amplitude increased to 29.2mV, or 10.4mV larger than with stray capacitance alone. We estimate from this that the stray capacitance of the high gain section is approximately 0.2 ± 0.1 pF.
Following similar steps for the low gain section we observed signals of 9.6 mV, 18.4 mV, and 50 mV. Thus we estimate the stray capacitance here as 0.1± 0.1 pF.
These measured values agree with independent rough estimates. The tolerance of the 100 pF capacitor is 1% and thus the observed parasitic effects of 0.1% are negligible. The 5 pF capacitor has a correction of ~ 4% from parasitic effects and should be calibrated in situ using the large capacitor.