Html last updated 2018-02-07 00:23:09.016160



Input1_RxLDC

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-04-13 00:05:42 2:04:20 abd934b 9ea10b2 1D52FD 5944 1090 0 142.8/100.0 151.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170413_000542.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-12 00:07:04 2:05:41 abd934b 9ea10b2 1D52E5 5944 1090 0 136.8/100.0 169.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170412_000704.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 00:03:20 2:01:56 abd934b 9ea10b2 1D52CD 5944 1090 0 144.0/100.0 158.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170411_000320.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 00:01:57 2:00:28 abd934b 9ea10b2 1D52B5 5944 1090 0 134.3/100.0 150.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170410_000157.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 00:08:48 2:07:24 abd934b 9ea10b2 1D529D 5944 1090 0 148.5/100.0 146.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170409_000848.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 00:02:55 2:01:32 abd934b 9ea10b2 1D5285 5944 1090 0 139.3/100.0 159.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170408_000255.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 00:04:59 2:03:31 abd934b 9ea10b2 1D526D 5944 1090 0 155.4/100.0 160.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170407_000459.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 00:03:17 2:01:55 abd934b 9ea10b2 1D5255 5944 1090 0 136.0/100.0 158.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170406_000317.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 00:01:29 2:00:02 abd934b 9ea10b2 1D523D 5944 1090 0 139.0/100.0 155.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170405_000129.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 00:04:15 2:02:49 abd934b 9ea10b2 1D5225 5944 1090 0 147.7/100.0 149.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170404_000415.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-03 00:02:22 2:01:19 abd934b 9ea10b2 1D520D 5944 1090 0 139.5/100.0 141.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170403_000222.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-02 00:01:40 2:00:31 abd934b 9ea10b2 1D51F5 5944 1090 0 147.0/100.0 161.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170402_000140.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-31 23:59:23 1:58:26 abd934b 9ea10b2 1D51DD 5944 1090 0 151.8/100.0 161.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170331_235923.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-31 00:02:05 2:01:02 282610e 9ea10b2 1D51C5 5944 1090 0 134.6/100.0 163.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170331_000205.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-30 00:07:02 2:05:56 282610e 9ea10b2 1D51AD 5944 1090 0 128.3/100.0 158.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170330_000702.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-29 00:02:45 2:01:43 282610e 9ea10b2 1D5195 5944 1090 0 144.9/100.0 158.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170329_000245.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-28 00:04:37 2:03:28 282610e 9ea10b2 1D517D 5944 1090 0 134.1/100.0 152.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170328_000437.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-27 00:00:57 1:59:39 282610e 9ea10b2 1D5165 5944 1090 0 136.6/100.0 157.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170327_000057.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-26 00:05:27 2:04:25 282610e 9ea10b2 1D514D 5944 1090 0 133.5/100.0 170.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170326_000527.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-25 00:09:50 2:08:35 282610e 9ea10b2 1D5135 5944 1090 0 136.7/100.0 158.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170325_000950.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-23 23:58:31 1:57:28 282610e 9ea10b2 1D511D 5944 1090 0 133.4/100.0 159.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170323_235831.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 23:54:22 1:53:24 282610e 9ea10b2 1D5105 5944 1090 0 141.1/100.0 169.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170322_235422.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 00:19:14 2:17:57 282610e 9ea10b2 1D50ED 5944 1090 0 136.3/100.0 167.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170322_001914.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 00:07:57 2:06:47 282610e 9ea10b2 1D50D5 5944 1090 0 127.6/100.0 168.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170321_000757.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 00:04:12 2:03:02 282610e 9ea10b2 1D50BD 5944 1090 0 146.1/100.0 157.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170320_000412.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 00:11:56 2:10:45 282610e 9ea10b2 1D50A5 5944 1090 0 125.4/100.0 136.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170319_001156.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 00:08:36 2:07:25 282610e 9ea10b2 1D508D 5944 1090 0 143.8/100.0 163.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170318_000836.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-16 00:11:31 2:10:12 282610e 9ea10b2 1D505D 5944 1090 0 141.9/100.0 167.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170316_001131.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 00:05:48 2:04:39 282610e 9ea10b2 1D5045 5944 1090 0 144.8/100.0 164.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170315_000548.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 00:03:41 2:02:36 282610e 9ea10b2 1D502D 5944 1090 0 140.9/100.0 159.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170314_000341.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 00:08:27 2:07:22 282610e 9ea10b2 1D5015 5944 1090 0 133.3/100.0 157.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170313_000827.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 00:08:43 2:07:34 282610e 9ea10b2 1D4FFE 5944 1090 0 136.2/100.0 164.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170312_000843.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 00:16:31 2:15:17 282610e 9ea10b2 1D4FE6 5944 1090 0 140.1/100.0 149.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170311_001631.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 00:18:51 2:17:39 282610e 9ea10b2 1D4FCE 5944 1090 0 134.3/100.0 166.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170310_001851.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 00:19:50 2:18:43 282610e 9ea10b2 1D4FB6 5944 1090 0 143.4/100.0 170.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170309_001950.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 00:16:14 2:15:04 282610e 9ea10b2 1D4F9E 5944 1090 0 136.6/100.0 151.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170308_001614.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-07 00:07:56 2:06:45 282610e 9627342 1D4F86 5808 1069 0 146.6/100.0 164.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170307_000756.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-06 00:09:05 2:07:55 282610e 9627342 1D4F6E 5808 1069 0 142.9/100.0 167.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170306_000905.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-05 00:09:51 2:08:41 282610e 9627342 1D4F56 5808 1069 0 129.0/100.0 172.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170305_000951.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-04 00:08:44 2:07:32 282610e 9627342 1D4F3E 5808 1069 0 130.6/100.0 171.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170304_000844.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-03 00:07:48 2:06:37 282610e 9627342 1D4F26 5808 1069 0 139.5/100.0 164.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170303_000748.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-02 00:07:35 2:06:24 282610e 9627342 1D4F0E 5808 1069 0 139.4/100.0 171.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170302_000735.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-01 00:12:37 2:11:24 282610e 9627342 1D4EF6 5808 1069 0 143.4/100.0 166.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170301_001237.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-28 00:16:44 2:15:30 282610e 9627342 1D4EDE 5808 1069 0 148.3/100.0 159.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170228_001644.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-27 00:15:35 2:14:24 282610e 9627342 1D4EC6 5808 1069 0 149.8/100.0 164.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170227_001535.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-26 00:14:31 2:13:19 282610e 9627342 1D4EAE 5808 1069 0 155.0/100.0 159.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170226_001431.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-25 00:12:17 2:11:08 282610e 9627342 1D4E96 5808 1069 0 138.8/100.0 163.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170225_001217.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-24 00:14:06 2:12:53 282610e 9627342 1D4E7E 5808 1069 0 134.6/100.0 166.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170224_001406.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-23 00:16:47 2:15:33 282610e 9627342 1D4E66 5808 1069 0 142.0/100.0 162.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170223_001647.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-22 00:18:23 2:17:10 282610e 9627342 1D4E4E 5808 1069 0 139.1/100.0 160.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170222_001823.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-21 00:08:08 2:07:01 282610e 9627342 1D4E36 5808 1069 0 145.7/100.0 158.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170221_000808.tar.bz2 .


Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-19 22:01:06 0:00:43 4eea5ce 9627342 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170219_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Sun Feb 19 22:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 22:01:05 0:00:44 4eea5ce 9627342 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170218_220105.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Sat Feb 18 22:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 22:01:46 0:00:52 4eea5ce 9627342 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170217_220146.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Fri Feb 17 22:01:46 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-16 22:01:15 0:00:45 4eea5ce 9627342 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170216_220115.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Thu Feb 16 22:01:15 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-15 22:01:04 0:00:42 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170215_220104.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Wed Feb 15 22:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-14 22:01:06 0:00:45 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170214_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Tue Feb 14 22:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-13 22:01:06 0:00:44 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170213_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Mon Feb 13 22:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-12 22:01:05 0:00:45 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170212_220105.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sun Feb 12 22:01:05 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-11 22:01:06 0:00:43 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170211_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sat Feb 11 22:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-10 22:01:06 0:00:46 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170210_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Fri Feb 10 22:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-09 22:01:06 0:00:44 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170209_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Thu Feb 09 22:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-08 22:01:06 0:00:45 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170208_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 957 megabytes
Error: Processing ended: Wed Feb 08 22:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-07 22:01:08 0:00:44 4eea5ce ab48262 N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170207_220108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Tue Feb 07 22:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-06 22:01:06 0:00:43 4eea5ce 6d928dd N/A 1329 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170206_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Mon Feb 06 22:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-02-05 22:01:11 0:00:46 29059d9 733048d N/A 1328 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170205_220111.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sun Feb 05 22:01:11 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-02 22:01:07 0:00:42 29059d9 733048d N/A 1328 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170202_220107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Thu Feb 02 22:01:06 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-01 22:01:06 0:00:42 29059d9 733048d N/A 1328 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170201_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Wed Feb 01 22:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-01-31 22:01:04 0:00:41 29059d9 1abcab8 N/A 1326 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170131_220104.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Tue Jan 31 22:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-30 22:01:03 0:00:39 29059d9 1abcab8 N/A 1326 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170130_220103.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Mon Jan 30 22:01:02 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-29 22:01:09 0:00:43 29059d9 1abcab8 N/A 1326 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170129_220109.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sun Jan 29 22:01:08 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-28 22:01:06 0:00:42 29059d9 1abcab8 N/A 1326 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170128_220106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sat Jan 28 22:01:05 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 22:01:09 0:00:46 29059d9 1abcab8 N/A 1326 5 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170127_220109.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Fri Jan 27 22:01:09 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-26 23:59:48 1:58:36 f07602d 1abcab8 1D4BDE 5583 353 0 143.6/100.0 158.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170126_235948.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Mar 28 18:01:18 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-25 23:59:09 1:57:56 f07602d 1abcab8 1D4BC6 5583 353 0 141.2/100.0 165.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170125_235909.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-24 23:56:10 1:54:58 f07602d 1abcab8 1D4BAE 5583 353 0 142.5/100.0 166.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170124_235610.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34926 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 23:45:25 1:44:13 f07602d 1abcab8 1D4B96 5583 353 0 145.1/100.0 161.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170123_234525.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-22 23:58:40 1:57:24 f07602d 6aed696 1D4B7E 5583 353 0 138.8/100.0 168.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170122_235840.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-21 23:50:36 1:49:28 f07602d 6aed696 1D4B66 5583 353 0 142.2/100.0 162.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170121_235036.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-20 23:49:02 1:47:51 f07602d 6aed696 1D4B4E 5583 353 0 137.3/100.0 164.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170120_234902.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-19 23:48:37 1:47:23 f07602d 6aed696 1D4B36 5583 353 0 152.5/100.0 166.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170119_234837.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-18 23:46:14 1:45:04 f07602d 6aed696 1D4B1E 5583 353 0 140.0/100.0 164.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170118_234614.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-17 23:53:03 1:51:52 f07602d 04ac7d4 1D4B06 5583 353 0 143.6/100.0 166.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170117_235303.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-16 23:59:16 1:58:06 f07602d 04ac7d4 1D4AEE 5583 353 0 142.6/100.0 160.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170116_235916.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-16 00:07:16 2:05:59 f07602d f812395 1D4AD6 5583 353 0 142.8/100.0 164.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170116_000716.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34978 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-15 00:04:30 2:03:16 f07602d f812395 1D4ABE 5583 353 0 150.5/100.0 159.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170115_000430.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-14 00:09:49 2:07:49 f07602d f812395 1D4AA6 5583 353 0 138.5/100.0 160.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170114_000949.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34968 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-13 00:01:38 2:00:28 f07602d f812395 1D4A8E 5583 353 0 148.0/100.0 162.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170113_000138.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Thu Jan 05 18:01:54 2017
Error: Elapsed time: 00:01:26
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-12 00:00:08 1:58:45 f07602d f812395 1D4A76 5583 353 0 136.8/100.0 165.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170112_000008.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34979 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-11 00:00:20 1:59:07 f07602d f812395 1D4A5E 5583 353 0 150.3/100.0 162.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170111_000020.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-10 00:05:31 2:04:17 f07602d f812395 1D4A46 5583 353 0 142.2/100.0 164.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170110_000531.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-09 00:00:28 1:59:19 f07602d f812395 1D4A2E 5583 353 0 142.4/100.0 164.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170109_000028.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-07 23:59:45 1:58:32 f07602d f812395 1D4A16 5583 353 0 139.9/100.0 159.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170107_235945.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35178 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 23:56:46 1:55:32 f07602d f812395 1D49FE 5583 353 0 148.8/100.0 168.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170106_235646.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 00:00:20 1:59:07 f07602d f812395 1D49E6 5583 353 0 134.7/100.0 166.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170106_000020.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-04 23:34:17 1:33:19 f07602d f812395 1D49CE 5583 353 0 141.7/100.0 162.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170104_233417.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35028 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-03 23:32:43 1:31:48 f07602d f812395 1D49B6 5583 353 0 146.8/100.0 167.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170103_233243.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-02 23:34:07 1:33:10 f07602d f812395 1D499E 5583 353 0 148.5/100.0 165.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170102_233407.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-01 23:33:14 1:32:18 f07602d f812395 1D4986 5583 353 0 145.3/100.0 163.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20170101_233314.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34899 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 23:36:19 1:35:23 f07602d f812395 1D496E 5583 353 0 136.8/100.0 167.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161231_233619.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 00:53:26 2:52:18 f07602d f812395 1D4956 5584 353 0 153.2/100.0 164.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161231_005326.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-29 23:42:06 1:41:10 f07602d f812395 1D493E 5583 353 0 133.8/100.0 166.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161229_234206.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 15 18:01:06 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-28 23:34:05 1:33:09 f07602d f812395 1D4926 5583 353 0 140.8/100.0 154.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161228_233405.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 23:35:04 1:34:08 f07602d f812395 1D490E 5583 353 0 141.9/100.0 163.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161227_233504.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Thu Jan 12 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-25 23:32:13 1:31:14 f07602d f812395 1D48DE 5583 353 0 144.1/100.0 164.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161225_233213.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-24 23:34:07 1:33:11 f07602d f812395 1D48C6 5583 353 0 145.1/100.0 164.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161224_233407.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-23 23:31:24 1:30:25 f07602d f812395 1D48AE 5583 353 0 138.2/100.0 161.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161223_233124.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 23:32:29 1:31:32 f07602d f812395 1D4896 5583 353 0 140.7/100.0 160.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161222_233229.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 00:51:06 2:50:08 f07602d f812395 1D487E 5583 353 0 148.1/100.0 166.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161222_005106.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-20 23:40:06 1:39:04 f07602d f812395 1D4866 5583 353 0 142.5/100.0 165.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161220_234006.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Feb 20 18:01:05 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-19 23:31:53 1:30:57 f07602d f812395 1D484E 5583 353 0 145.3/100.0 160.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161219_233153.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-18 23:29:59 1:29:02 f07602d f812395 1D4836 5583 353 0 143.3/100.0 167.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161218_232959.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-17 23:31:40 1:30:45 f07602d f812395 1D481E 5583 353 0 150.0/100.0 167.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161217_233140.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-16 23:31:14 1:30:13 f07602d f812395 1D4806 5583 353 0 132.9/100.0 164.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161216_233114.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-16 01:07:20 3:06:23 f07602d f812395 1D47EE 5584 353 0 145.6/100.0 163.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161216_010720.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-15 04:07:33 6:06:37 f07602d f812395 1D45E2 5584 353 0 142.6/100.0 160.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161215_040733.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-14 01:08:08 3:07:19 f07602d e90ac0c 1D47BE 5584 353 0 140.1/100.0 163.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161214_010808.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34963 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-13 04:25:59 6:25:05 f07602d e90ac0c 1D45E2 5584 353 0 141.8/100.0 166.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161213_042559.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-12 03:35:48 5:32:48 f07602d e90ac0c 1D45E2 5585 353 0 144.8/100.0 169.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161212_033548.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-10 23:52:33 1:51:29 f07602d e90ac0c 1D4776 5583 353 0 147.9/100.0 165.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161210_235233.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-09 23:53:33 1:52:27 f07602d e90ac0c 1D475E 5583 353 0 139.9/100.0 163.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161209_235333.tar.bz2 .


Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-08 01:13:27 3:12:31 e4d68ea b113c0d 1D472E 5585 355 0 144.3/100.0 161.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161208_011327.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-07 14:29:03 16:28:06 e4d68ea b113c0d 1D41F4 5584 355 0 152.8/100.0 166.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161207_142903.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-06 00:27:37 2:24:59 e4d68ea b113c0d 1D46FE 5584 355 0 145.9/100.0 168.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161206_002737.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-04 23:33:28 1:32:32 e4d68ea b113c0d 1D46E6 5583 355 0 120.9/100.0 166.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161204_233328.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Mon Mar 27 21:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 23:49:11 1:48:11 e4d68ea b113c0d 1D46CE 5583 355 0 139.3/100.0 166.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161203_234911.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-02 02:55:21 4:54:24 e4d68ea b113c0d 1D41F4 5584 355 0 153.7/100.0 162.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161202_025521.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35064 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 11:25:07 13:24:07 e4d68ea b113c0d 1D41F4 5585 355 0 141.9/100.0 164.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161201_112507.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-30 10:18:13 12:17:11 e4d68ea b113c0d 1D41F4 5584 355 0 138.5/100.0 165.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161130_101813.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-28 23:31:37 1:30:39 e4d68ea b113c0d 1D4656 5583 355 0 141.0/100.0 168.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161128_233137.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Tue Mar 14 01:01:05 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-27 23:29:45 1:28:48 e4d68ea b113c0d 1D463E 5583 355 0 139.0/100.0 163.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161127_232945.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-26 23:32:08 1:31:16 e4d68ea b113c0d 1D4626 5583 355 0 145.6/100.0 165.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161126_233208.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-25 23:37:10 1:36:10 e4d68ea b113c0d 1D460E 5583 355 0 143.8/100.0 167.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161125_233710.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-24 23:35:10 1:34:10 e4d68ea b113c0d 1D45F6 5583 355 0 139.9/100.0 167.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161124_233510.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34968 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-23 23:34:15 1:33:16 e4d68ea bb9d09b 1D45DE 5585 354 0 139.2/100.0 161.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161123_233415.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34915 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb9d09b1fcac326152c629bf90bd01f6f007f221
Merge: bb3320f 40fb5c7
Author: FTK User
Date: Wed Nov 23 18:00:37 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 40fb5c78dc7da9fd78b9c675be6b0a9a3cef2ff1
Author: U-Chicago1\rzou
Date: Wed Nov 23 23:06:48 2016 +0100

A:q

A
A
A
B
:
B
B
tsort hold propagation
2016-11-22 23:30:11 1:29:14 e4d68ea bb3320f 1D45C6 5583 355 0 149.5/100.0 158.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161122_233011.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35026 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-21 23:40:45 1:39:45 e4d68ea bb3320f 1D45AE 5583 355 0 140.3/100.0 164.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161121_234045.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-20 23:38:17 1:37:15 e4d68ea bb3320f 1D4596 5583 355 0 144.6/100.0 161.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161120_233817.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-19 23:36:34 1:35:36 e4d68ea bb3320f 1D457E 5583 355 0 135.3/100.0 161.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161119_233634.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-18 23:31:37 1:30:38 e4d68ea bb3320f 1D4566 5583 355 0 140.7/100.0 162.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161118_233137.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-17 23:32:34 1:31:35 e4d68ea bb3320f 1D454E 5583 355 0 142.9/100.0 158.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161117_233234.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-16 23:30:02 1:29:04 e4d68ea bb3320f 1D4536 5583 355 0 148.5/100.0 159.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161116_233002.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-15 23:32:45 1:31:50 e4d68ea bb3320f 1D451E 5583 355 0 144.4/100.0 161.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161115_233245.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-14 23:23:48 1:22:55 e4d68ea bb3320f 1D4506 5583 355 0 140.2/100.0 168.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161114_232348.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-13 23:22:39 1:21:44 e4d68ea 11f885e 1D44EE 5583 355 0 141.4/100.0 159.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161113_232239.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-12 23:25:04 1:24:08 e4d68ea 11f885e 1D44D6 5583 355 0 140.1/100.0 161.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161112_232504.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-11 23:24:22 1:23:27 e4d68ea 11f885e 1D44BE 5583 355 0 147.9/100.0 162.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161111_232422.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 01 18:01:03 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-10 23:27:59 1:27:03 e4d68ea 11f885e 1D44A6 5583 355 0 139.7/100.0 161.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161110_232759.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34941 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-09 23:27:15 1:26:19 e4d68ea 11f885e 1D448E 5583 355 0 140.9/100.0 167.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161109_232715.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 23:28:27 1:27:33 e4d68ea 11f885e 1D4476 5583 355 0 147.5/100.0 167.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161108_232827.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 08:32:59 10:31:52 e4d68ea 337b57e 1D445E 5521 353 0 135.7/100.0 149.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161108_083259.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-07 16:10:38 18:09:13 e4d68ea 337b57e 1D41F4 5521 353 0 146.4/100.0 163.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161107_161038.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-06 02:04:37 5:03:17 e4d68ea 337b57e 1D442D 5521 353 0 147.2/100.0 158.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161106_020437.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-05 10:23:14 12:22:13 e4d68ea 337b57e 1D4415 5521 353 0 137.9/100.0 158.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161105_102314.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-04 06:09:40 8:08:31 e4d68ea 337b57e 1D43FD 5521 353 0 136.2/100.0 157.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161104_060940.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35865 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-02 23:26:40 1:25:41 e4d68ea 337b57e 1D43E5 5520 353 0 146.3/100.0 157.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161102_232640.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-01 23:29:31 1:28:38 e4d68ea 337b57e 1D43CD 5520 353 0 152.1/100.0 157.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161101_232931.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-31 23:39:55 1:37:39 e4d68ea 337b57e 1D43B5 5520 353 0 139.3/100.0 153.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161031_233955.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-29 11:07:44 13:06:41 e4d68ea 337b57e 1D436D 5521 353 0 137.1/100.0 159.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161029_110744.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 36007 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-28 18:47:34 20:46:17 e4d68ea 337b57e 1D41F4 5521 353 0 138.9/100.0 156.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161028_184734.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 23:36:17 1:35:21 e4d68ea 337b57e 1D433D 5520 353 0 142.9/100.0 150.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161026_233617.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 14:52:38 16:51:40 e4d68ea 337b57e 1D41F4 5521 353 0 147.4/100.0 162.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161026_145238.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-25 15:23:21 17:22:10 e4d68ea c92deb1 1D41F4 5526 353 0 145.7/100.0 150.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161025_152321.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit c92deb1a6ca50f978487919c40415efc261ffebc
Merge: dcf31e5 800b606
Author: FTK User
Date: Mon Oct 24 12:01:36 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 800b606fe85acaa6c85e8ac01f3e5a59484f8753
Author: unknown
Date: Mon Oct 24 17:14:05 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR
2016-10-23 23:29:28 1:28:30 392d325 dcf31e5 1D42F5 5520 350 0 143.8/100.0 159.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161023_232928.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-22 23:32:40 1:31:43 392d325 dcf31e5 1D42DD 5520 350 0 140.7/100.0 156.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161022_233240.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Thu Feb 09 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-21 23:37:47 1:36:49 392d325 dcf31e5 1D42C5 5520 350 0 136.6/100.0 156.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161021_233747.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-20 23:30:10 1:29:14 392d325 dcf31e5 1D42AD 5520 350 0 136.3/100.0 161.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161020_233010.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Apr 10 18:01:22 2017
Error: Elapsed time: 00:00:49
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-19 23:34:02 1:33:06 392d325 dcf31e5 1D4295 5520 350 0 135.5/100.0 154.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161019_233402.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-18 23:34:55 1:33:57 392d325 dcf31e5 1D427D 5520 350 0 137.2/100.0 156.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161018_233455.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-17 23:27:37 1:26:40 392d325 dcf31e5 1D4265 5520 350 0 147.5/100.0 155.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161017_232737.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 79 warnings
Error: Peak virtual memory: 14887 megabytes
Error: Processing ended: Mon Nov 07 15:25:04 2016
Error: Elapsed time: 1:08:38:52
Error: Total CPU time (on all processors): 2:18:54:29

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-16 23:28:56 1:28:00 392d325 dcf31e5 1D424D 5520 350 0 147.1/100.0 153.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161016_232856.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35425 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-15 23:25:27 1:24:32 392d325 dcf31e5 1D4235 5520 350 0 133.2/100.0 152.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161015_232527.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-14 23:27:10 1:25:59 392d325 dcf31e5 1D421D 5520 350 0 139.2/100.0 149.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161014_232710.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-13 23:33:46 1:32:46 392d325 dcf31e5 1D4205 5520 350 0 133.1/100.0 156.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161013_233346.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35386 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-12 23:35:54 1:34:57 392d325 810d361 1D41ED 5520 351 0 135.3/100.0 161.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161012_233554.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35385 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-12 01:16:26 3:15:23 392d325 810d361 1D41D5 5521 351 0 138.5/100.0 154.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161012_011626.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-11 01:09:32 3:08:21 392d325 810d361 1D41BD 5521 351 0 139.2/100.0 159.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161011_010932.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-09 23:32:00 1:31:00 392d325 810d361 1D41A5 5520 351 0 143.0/100.0 160.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161009_233200.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-08 23:29:53 1:28:53 392d325 810d361 1D418D 5520 351 0 136.8/100.0 157.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161008_232953.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-07 23:34:26 1:33:27 392d325 810d361 1D4175 5520 351 0 143.3/100.0 162.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161007_233426.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-06 23:34:50 1:33:50 392d325 810d361 1D415D 5520 351 0 136.6/100.0 159.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161006_233450.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-05 23:31:06 1:30:11 392d325 810d361 1D4145 5520 351 0 138.9/100.0 163.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161005_233106.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-04 23:32:45 1:31:51 392d325 810d361 1D412D 5520 351 0 132.9/100.0 155.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161004_233245.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35380 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-04 16:18:22 1:34:36 392d325 810d361 1D4125 5520 351 0 147.9/100.0 160.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161004_161822.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-01 03:05:15 5:04:15 5e043f5 7b8defc N/A 4315 337 1 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20161001_030515.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 0 / 0 -
Total DSP Blocks 0 / 0 -
Horizontal periphery clocks and Vertical periphery clocks 0 / 0 -

Assembler Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-28 23:49:09 1:48:17 6d52e43 e61013c 1D409D 5499 331 0 147.1/100.0 162.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160928_234909.tar.bz2 .


Firmware Git Logs

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-09-28 19:15:10 2:24:46 6d52e43 e61013c 1D4097 5500 331 0 141.7/100.0 155.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160928_191510.tar.bz2 .


Firmware Git Logs

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-09-28 12:30:39 1:53:56 6d52e43 cbacb53 1D3800 5519 325 0 150.0/100.0 142.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160928_123039.tar.bz2 .


Firmware Git Logs

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

AUXCommon Git Logs

commit cbacb539201d8da0b521acee034568f77a5fa8d4
Author: FTK User
Date: Wed Sep 28 10:29:13 2016 -0700

chmod +x convert.sh

commit 905000b0c77dc56a86eebb04e0a7441870b78e3a
Author: FTK User
Date: Tue Sep 27 13:42:01 2016 -0700

chmod +x nightly.sh
2016-08-15 23:19:16 1:17:31 937c670 4b63cf8 1D3C7D 5513 328 0 132.5/100.0 156.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160815_231916.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 23:15:25 1:14:18 937c670 4b63cf8 1D3C65 5513 328 0 135.6/100.0 149.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160814_231525.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 23:18:03 1:17:01 937c670 4b63cf8 1D3C4D 5513 328 0 133.3/100.0 150.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160813_231803.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 23:09:49 1:08:20 937c670 4b63cf8 1D3C35 5513 328 0 144.5/100.0 154.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160812_230949.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 23:24:22 1:23:12 937c670 4b63cf8 1D3C1D 5513 328 0 142.7/100.0 147.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160811_232422.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 23:14:33 1:13:21 937c670 4b63cf8 1D3C05 5513 328 0 138.4/100.0 156.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160810_231433.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 23:36:37 1:35:08 937c670 4b63cf8 1D3BED 5513 328 0 131.8/100.0 149.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160809_233637.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 23:22:53 1:21:45 937c670 4b63cf8 1D3BD5 5513 328 0 140.1/100.0 152.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160808_232253.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 01:01:13 2:59:24 937c670 4b63cf8 1D3BBD 5513 328 0 148.5/100.0 137.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160808_010113.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sat Mar 04 02:01:20 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:15

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 23:13:39 1:12:22 937c670 4b63cf8 1D3BA5 5513 328 0 133.2/100.0 156.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160806_231339.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 23:14:22 1:13:11 937c670 4b63cf8 1D3B8D 5513 328 0 146.5/100.0 153.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160805_231422.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35780 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 05:10:26 7:08:59 937c670 4b63cf8 1D3800 5514 328 0 142.8/100.0 155.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160805_051026.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 02:15:05 4:13:42 937c670 4b63cf8 1D3800 5513 328 0 129.7/100.0 157.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160804_021505.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 23:16:38 1:15:21 937c670 4b63cf8 1D3B45 5513 328 0 134.4/100.0 142.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160802_231638.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35902 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 23:11:33 1:10:21 937c670 4b63cf8 1D3B2D 5513 328 0 147.7/100.0 149.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160801_231133.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 23:14:47 1:13:33 937c670 4b63cf8 1D3B15 5513 328 0 132.1/100.0 157.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160731_231447.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 23:17:01 1:15:43 937c670 4b63cf8 1D3AFD 5513 328 0 144.6/100.0 156.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160730_231701.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 23:16:11 1:14:57 937c670 4b63cf8 1D3AE5 5513 328 0 143.0/100.0 160.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160729_231611.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 23:15:31 1:14:15 937c670 4b63cf8 1D3ACD 5513 328 0 143.1/100.0 159.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160728_231531.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 23:21:28 1:20:09 937c670 4b63cf8 1D3AB5 5513 328 0 145.3/100.0 138.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160727_232128.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 23:20:29 1:19:18 937c670 4b63cf8 1D3A9D 5513 328 0 144.7/100.0 153.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160726_232029.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 23:25:26 1:24:10 937c670 4b63cf8 1D3A85 5513 328 0 142.3/100.0 151.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160725_232526.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 23:23:27 1:22:04 937c670 4b63cf8 1D3A6D 5513 328 0 140.8/100.0 145.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160724_232327.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35758 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 23:46:27 1:45:09 937c670 4b63cf8 1D3A55 5513 328 0 144.4/100.0 154.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160723_234627.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35722 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 23:19:48 1:18:35 937c670 4b63cf8 1D3A3D 5513 328 0 139.6/100.0 153.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160722_231948.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35793 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 23:25:55 1:24:31 937c670 4b63cf8 1D3A25 5513 328 0 124.9/100.0 157.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160721_232555.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Sat Feb 25 03:01:19 2017
Error: Elapsed time: 00:00:09
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 00:23:54 2:22:42 937c670 4b63cf8 1D3A0D 5513 328 0 150.5/100.0 148.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160721_002354.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 07:26:25 9:25:09 937c670 4b63cf8 1D39F5 5514 328 0 142.7/100.0 149.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160720_072625.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 23:16:54 1:15:44 937c670 4b63cf8 1D39DD 5513 328 0 140.4/100.0 154.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160718_231654.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 23:06:40 1:05:34 937c670 4b63cf8 1D39C5 5513 328 0 132.7/100.0 152.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160717_230640.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 23:18:29 1:16:46 937c670 4b63cf8 1D39AD 5513 328 0 145.2/100.0 142.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160716_231829.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 23:34:54 1:33:16 937c670 4b63cf8 1D3995 5513 328 0 139.6/100.0 151.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160715_233454.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 23:34:53 1:33:20 937c670 4b63cf8 1D397D 5513 328 0 133.0/100.0 151.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160714_233453.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13834 megabytes
Error: Processing ended: Sat Jul 30 07:48:31 2016
Error: Elapsed time: 05:01:19
Error: Total CPU time (on all processors): 08:45:23

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 23:34:42 1:33:26 937c670 4b63cf8 1D3965 5513 328 0 135.3/100.0 149.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160713_233442.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 23:37:20 1:36:03 937c670 4b63cf8 1D394D 5513 328 0 147.2/100.0 153.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160712_233720.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35837 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 23:28:49 1:27:32 937c670 4b63cf8 1D3935 5513 328 0 142.5/100.0 146.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160711_232849.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 23:26:09 1:24:58 937c670 4b63cf8 1D391D 5513 328 0 144.7/100.0 159.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160710_232609.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 23:34:35 1:33:13 937c670 4b63cf8 1D3905 5513 328 0 139.9/100.0 158.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160709_233435.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 23:30:26 1:29:07 937c670 4b63cf8 1D38ED 5513 328 0 143.6/100.0 154.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160708_233026.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13801 megabytes
Error: Processing ended: Wed Aug 03 08:18:22 2016
Error: Elapsed time: 05:22:10
Error: Total CPU time (on all processors): 09:05:23

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 23:27:54 1:26:39 937c670 4b63cf8 1D38D5 5513 328 0 141.8/100.0 156.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160707_232754.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 23:49:02 1:47:51 937c670 4b63cf8 1D38BD 5513 328 0 135.4/100.0 152.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160706_234902.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35878 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 10:30:37 12:27:01 937c670 4b63cf8 1D38A5 5514 328 0 144.7/100.0 159.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160706_103037.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-05 11:12:38 13:10:54 937c670 4b63cf8 1D388D 5515 328 0 128.9/100.0 136.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160705_111238.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35884 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 07:55:30 9:53:58 937c670 4b63cf8 1D3875 5514 328 0 142.2/100.0 156.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160704_075530.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-03 08:08:42 10:07:14 937c670 4b63cf8 1D385D 5514 328 0 140.1/100.0 155.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160703_080842.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 08:19:15 10:17:52 937c670 4b63cf8 1D3845 5514 328 0 137.0/100.0 158.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160702_081915.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 23:31:48 1:30:33 937c670 4b63cf8 1D382D 5513 328 0 142.5/100.0 148.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160630_233148.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 01:28:18 3:27:06 937c670 4b63cf8 1D3815 5513 328 0 144.3/100.0 155.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160630_012818.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 35771 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 07:06:31 9:04:45 0c742a8 4b63cf8 1D37FD 5514 329 0 146.1/100.0 156.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160629_070631.tar.bz2 .


Firmware Git Logs

commit 0c742a8e9273e05a5b3f7f991dde8d8a6052d631
Author: unknown
Date: Tue Jun 21 10:47:33 2016 -0500

Increased ssmap input spybuffer depth to hold full tv

commit 032aba3643ce476d90bed943989ddd786fd50642
Author: unknown
Date: Wed Jun 15 17:06:12 2016 -0500

moving HitSort folder to AUXCommon

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-27 23:53:08 1:51:47 0c742a8 04f33a4 1D37E5 5513 328 0 146.6/100.0 143.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLDC_20160627_235308.tar.bz2 .


Firmware Git Logs

commit 0c742a8e9273e05a5b3f7f991dde8d8a6052d631
Author: unknown
Date: Tue Jun 21 10:47:33 2016 -0500

Increased ssmap input spybuffer depth to hold full tv

commit 032aba3643ce476d90bed943989ddd786fd50642
Author: unknown
Date: Wed Jun 15 17:06:12 2016 -0500

moving HitSort folder to AUXCommon

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Input1_RxLSC

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-03-13 12:01:12 0:00:10 282610e 9ea10b2 N/A 32 2 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170313_120112.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 2 warnings
Error: Peak virtual memory: 437 megabytes
Error: Processing ended: Mon Mar 13 12:01:11 2017
Error: Elapsed time: 00:00:10
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-02-20 12:01:05 0:00:04 282610e 9627342 N/A 29 2 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170220_120105.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 2 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Feb 20 12:01:05 2017
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 12:01:46 0:00:05 4eea5ce 9627342 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170217_120146.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Fri Feb 17 12:01:45 2017
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-06 12:01:43 0:00:03 4eea5ce 6d928dd N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170206_120143.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Feb 06 12:01:43 2017
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-01-28 12:01:14 0:00:03 29059d9 1abcab8 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170128_120114.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Sat Jan 28 12:01:14 2017
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 12:01:10 0:00:06 29059d9 1abcab8 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170127_120110.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Fri Jan 27 12:01:10 2017
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 12:01:23 0:00:04 f07602d 6aed696 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170123_120123.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Mon Jan 23 12:01:22 2017
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-16 12:02:08 0:00:05 f07602d 04ac7d4 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170116_120208.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Mon Jan 16 12:02:08 2017
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-12 12:02:17 0:00:02 f07602d f812395 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20170112_120217.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Thu Jan 12 12:02:17 2017
Error: Elapsed time: 00:00:02
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-09 12:01:05 0:00:03 f07602d e90ac0c N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161209_120105.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Fri Dec 09 12:01:04 2016
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-08 12:01:06 0:00:04 e4d68ea fa16ef3 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161208_120106.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Thu Dec 08 12:01:06 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit fa16ef360dba35f2b735acfd645c62c9daabe657
Merge: b113c0d b6482ae
Author: FTK User
Date: Thu Dec 8 12:00:59 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit b6482ae100a7e48adf09d638c2b4f762787c2631
Merge: fe5cf0a 174ec1d
Author: unknown
Date: Thu Dec 8 15:25:52 2016 +0100

Merge remote-tracking branch 'origin/master'

Conflicts:
ssmap/tcl/tb_SSMapPixelLayer.do
2016-11-14 12:02:45 0:00:05 e4d68ea bb3320f N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161114_120245.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Nov 14 12:02:45 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-08 12:01:47 0:00:06 e4d68ea 11f885e N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161108_120147.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Tue Nov 08 12:01:47 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-07 12:01:20 0:00:05 e4d68ea 337b57e N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161107_120120.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Nov 07 12:01:20 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-25 12:01:03 0:00:05 e4d68ea 337b57e N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161025_120103.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Tue Oct 25 12:01:02 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-24 12:01:43 0:00:04 e4d68ea c92deb1 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161024_120143.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Oct 24 12:01:43 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit c92deb1a6ca50f978487919c40415efc261ffebc
Merge: dcf31e5 800b606
Author: FTK User
Date: Mon Oct 24 12:01:36 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 800b606fe85acaa6c85e8ac01f3e5a59484f8753
Author: unknown
Date: Mon Oct 24 17:14:05 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR
2016-10-13 12:01:09 0:00:02 392d325 dcf31e5 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161013_120109.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 437 megabytes
Error: Processing ended: Thu Oct 13 12:01:08 2016
Error: Elapsed time: 00:00:02
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-06 12:01:10 0:00:04 392d325 810d361 N/A 28 1 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20161006_120110.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Thu Oct 06 12:01:09 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 12:02:14 0:00:04 6d52e43 7b8defc N/A 29 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160929_120214.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Thu Sep 29 12:02:13 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-28 12:57:29 0:55:35 6d52e43 cbacb53 1A4093 4765 142 0 136.9/100.0 182.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160928_125729.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18077 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

AUXCommon Git Logs

commit cbacb539201d8da0b521acee034568f77a5fa8d4
Author: FTK User
Date: Wed Sep 28 10:29:13 2016 -0700

chmod +x convert.sh

commit 905000b0c77dc56a86eebb04e0a7441870b78e3a
Author: FTK User
Date: Tue Sep 27 13:42:01 2016 -0700

chmod +x nightly.sh
2016-08-15 12:38:01 0:36:14 937c670 4b63cf8 1A3C73 4765 142 0 138.7/100.0 178.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160815_123801.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 12:45:16 0:43:58 937c670 4b63cf8 1A3C5B 4765 142 0 135.8/100.0 185.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160814_124516.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 12:36:29 0:35:23 937c670 4b63cf8 1A3C43 4765 142 0 139.1/100.0 187.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160813_123629.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 12:37:59 0:36:28 937c670 4b63cf8 1A3C2B 4765 142 0 137.7/100.0 183.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160812_123759.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18074 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 12:39:26 0:37:59 937c670 4b63cf8 1A3C13 4765 142 0 136.1/100.0 169.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160811_123926.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 12:41:22 0:39:49 937c670 4b63cf8 1A3BFB 4765 142 0 141.1/100.0 182.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160810_124122.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 13:27:52 1:26:32 937c670 4b63cf8 1A3BE3 4765 142 0 140.7/100.0 172.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160809_132752.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18043 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 12:39:25 0:37:55 937c670 4b63cf8 1A3BCB 4765 142 0 141.4/100.0 174.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160808_123925.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18084 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 12:44:03 0:42:26 937c670 4b63cf8 1A3BB3 4765 142 0 136.0/100.0 164.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160807_124403.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 14:16:19 2:14:57 937c670 4b63cf8 1A3B9B 4765 142 0 143.7/100.0 166.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160806_141619.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 14:00:41 1:59:07 937c670 4b63cf8 1A3B83 4766 142 0 136.5/100.0 172.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160805_140041.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 17:02:54 5:01:24 937c670 4b63cf8 1A3B6B 4766 142 0 129.6/100.0 167.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160804_170254.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 12:42:19 0:40:43 937c670 4b63cf8 1A3B53 4765 142 0 135.3/100.0 172.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160803_124219.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 2 warnings
Error: Peak virtual memory: 437 megabytes
Error: Processing ended: Mon Mar 13 12:01:11 2017
Error: Elapsed time: 00:00:10
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 12:43:13 0:41:39 937c670 4b63cf8 1A3B3B 4765 142 0 140.8/100.0 177.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160802_124313.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 12:38:04 0:36:32 937c670 4b63cf8 1A3B23 4765 142 0 141.7/100.0 169.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160801_123804.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 12:37:58 0:36:32 937c670 4b63cf8 1A3B0B 4765 142 0 135.2/100.0 175.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160731_123758.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 12:38:36 0:37:08 937c670 4b63cf8 1A3AF3 4765 142 0 137.8/100.0 184.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160730_123836.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 12:45:00 0:43:25 937c670 4b63cf8 1A3ADB 4765 142 0 134.7/100.0 172.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160729_124500.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 17993 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 12:40:51 0:39:18 937c670 4b63cf8 1A3AC3 4765 142 0 140.8/100.0 177.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160728_124051.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 12:46:51 0:45:17 937c670 4b63cf8 1A3AAB 4765 142 0 136.4/100.0 181.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160727_124651.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 12:38:12 0:36:33 937c670 4b63cf8 1A3A93 4765 142 0 136.7/100.0 180.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160726_123812.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18095 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 12:35:47 0:34:13 937c670 4b63cf8 1A3A7B 4765 142 0 132.7/100.0 177.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160725_123547.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18134 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 12:36:46 0:35:04 937c670 4b63cf8 1A3A63 4765 142 0 131.4/100.0 180.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160724_123646.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 12:35:20 0:33:49 937c670 4b63cf8 1A3A4B 4765 142 0 136.9/100.0 175.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160723_123520.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 12:38:40 0:37:08 937c670 4b63cf8 1A3A33 4765 142 0 144.3/100.0 177.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160722_123840.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Mon Dec 05 18:00:49 2016
Error: Elapsed time: 00:00:30
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 12:42:12 0:40:43 937c670 4b63cf8 1A3A1B 4765 142 0 129.2/100.0 175.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160721_124212.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 13:05:12 1:03:54 937c670 4b63cf8 1A3A03 4765 142 0 142.8/100.0 170.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160720_130512.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-19 13:50:29 1:49:02 937c670 4b63cf8 1A39EB 4765 142 0 135.0/100.0 173.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160719_135029.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Tue Feb 21 01:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 12:36:07 0:34:11 937c670 4b63cf8 1A39D3 4765 142 0 133.1/100.0 178.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160718_123607.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18104 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 12:36:05 0:34:32 937c670 4b63cf8 1A39BB 4765 142 0 134.9/100.0 168.8/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160717_123605.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sat Nov 12 18:00:58 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 12:33:58 0:32:38 937c670 4b63cf8 1A39A3 4765 142 0 139.7/100.0 173.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160716_123358.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 12:41:50 0:40:12 937c670 4b63cf8 1A398B 4765 142 0 141.5/100.0 181.9/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160715_124150.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 12:48:06 0:46:25 937c670 4b63cf8 1A3973 4765 142 0 143.9/100.0 171.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160714_124806.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 12:51:47 0:50:01 937c670 4b63cf8 1A395B 4765 142 0 135.1/100.0 179.7/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160713_125147.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 13:07:24 1:05:46 937c670 4b63cf8 1A3943 4765 142 0 139.7/100.0 180.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160712_130724.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 12:48:32 0:46:52 937c670 4b63cf8 1A392B 4765 142 0 142.3/100.0 181.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160711_124832.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sun Feb 26 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 13:15:12 1:13:38 937c670 4b63cf8 1A3913 4765 142 0 130.8/100.0 179.1/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160710_131512.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 12:54:13 0:52:20 937c670 4b63cf8 1A38FB 4765 142 0 136.2/100.0 169.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160709_125413.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18099 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 12:52:28 0:50:27 937c670 4b63cf8 1A38E3 4765 142 0 135.9/100.0 179.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160708_125228.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4285 megabytes
Error: Processing ended: Sat Oct 22 19:35:05 2016
Error: Elapsed time: 00:48:20
Error: Total CPU time (on all processors): 00:48:19

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 15:19:30 3:18:10 937c670 4b63cf8 1A38CB 4766 142 0 129.5/100.0 172.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160707_151930.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 12:48:14 0:46:43 937c670 4b63cf8 1A38B3 4765 142 0 143.1/100.0 184.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160706_124814.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 05:16:47 17:13:43 937c670 4b63cf8 1A1CF0 4766 142 0 127.1/100.0 164.6/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160706_051647.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 15:31:15 3:30:03 937c670 4b63cf8 1A3883 4766 142 0 138.3/100.0 174.5/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160704_153115.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-03 17:35:01 5:33:22 937c670 4b63cf8 1A386B 4766 142 0 137.9/100.0 179.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160703_173501.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18073 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 20:16:47 8:15:20 937c670 4b63cf8 1A3853 4766 142 0 142.3/100.0 173.2/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160702_201647.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18173 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-01 14:33:29 2:31:43 937c670 4b63cf8 1A383B 4766 142 0 129.7/100.0 179.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160701_143329.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 13:38:42 1:37:17 937c670 4b63cf8 1A3823 4765 142 0 143.6/100.0 179.0/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160630_133842.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 13:24:17 1:22:03 937c670 4b63cf8 1A380B 4765 142 0 147.7/100.0 178.4/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160629_132417.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-28 13:48:13 1:46:18 0c742a8 4b63cf8 1A37F3 4765 142 0 143.1/100.0 188.3/150.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxLSC_20160628_134813.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18064 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 32 / 248 0%

Firmware Git Logs

commit 0c742a8e9273e05a5b3f7f991dde8d8a6052d631
Author: unknown
Date: Tue Jun 21 10:47:33 2016 -0500

Increased ssmap input spybuffer depth to hold full tv

commit 032aba3643ce476d90bed943989ddd786fd50642
Author: unknown
Date: Wed Jun 15 17:06:12 2016 -0500

moving HitSort folder to AUXCommon

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort


Input1_RxRaw

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-04-22 02:03:25 FAILED
2017-04-13 03:00:13 0:58:42 abd934b 9ea10b2 105301 4806 379 0 137.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170413_030013.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 02:54:32 0:53:12 abd934b 9ea10b2 1052D1 4806 379 0 127.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170411_025432.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 02:54:33 0:53:07 abd934b 9ea10b2 1052B9 4806 379 0 130.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170410_025433.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 02:56:25 0:54:59 abd934b 9ea10b2 1052A1 4806 379 0 141.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170409_025625.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 02:54:13 0:52:51 abd934b 9ea10b2 105289 4806 379 0 135.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170408_025413.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 02:57:57 0:56:27 abd934b 9ea10b2 105271 4806 379 0 128.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170407_025757.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 02:54:11 0:52:50 abd934b 9ea10b2 105259 4806 379 0 138.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170406_025411.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 02:56:14 0:54:52 abd934b 9ea10b2 105241 4806 379 0 143.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170405_025614.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 02:58:17 0:56:52 abd934b 9ea10b2 105229 4806 379 0 134.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170404_025817.tar.bz2 .


Firmware Git Logs

commit abd934bf7bcd3f8cb1f4addd7fa76375215bda24
Author: Chicago1\rzou
Date: Fri Mar 31 18:23:38 2017 +0200

fixing nightly compiles for RxRaw

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 02:01:16 0:00:50 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170321_020116.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Tue Mar 21 02:01:12 2017
Error: Elapsed time: 00:00:45
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 02:01:12 0:00:48 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170320_020112.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Mon Mar 20 02:01:11 2017
Error: Elapsed time: 00:00:44
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 02:01:12 0:00:50 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170315_020112.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Wed Mar 15 02:01:12 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 02:01:15 0:00:51 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170314_020115.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Tue Mar 14 02:01:15 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 02:01:08 0:00:44 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170313_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Mon Mar 13 02:01:07 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 02:01:09 0:00:46 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170311_020109.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Mar 11 02:01:09 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 02:01:06 0:00:44 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170310_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Fri Mar 10 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 02:01:05 0:00:43 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170309_020105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Thu Mar 09 02:01:05 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:05

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 02:01:06 0:00:44 282610e 9ea10b2 N/A 1128 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170308_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Wed Mar 08 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-07 02:01:07 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170307_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Mar 07 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-06 02:01:09 0:00:47 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170306_020109.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Mon Mar 06 02:01:09 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-05 02:01:07 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170305_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Sun Mar 05 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-04 02:01:21 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170304_020121.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sat Mar 04 02:01:20 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:15

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-03 02:01:07 0:00:44 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170303_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Mar 03 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-02 02:01:06 0:00:44 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170302_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Thu Mar 02 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:07

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-01 02:01:07 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170301_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Mar 01 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-28 02:01:07 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170228_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Tue Feb 28 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-27 02:01:08 0:00:47 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170227_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Mon Feb 27 02:01:08 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-26 02:01:08 0:00:47 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170226_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sun Feb 26 02:01:08 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-25 02:01:07 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170225_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Sat Feb 25 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-24 02:01:08 0:00:46 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170224_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Fri Feb 24 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-23 02:01:08 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170223_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Thu Feb 23 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-22 02:01:07 0:00:44 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170222_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Feb 22 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-21 02:01:07 0:00:45 282610e 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170221_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Feb 21 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 282610eac934515d423f6f05b5c2dd6f9a38bfe9
Author: Chicago1\rzou
Date: Mon Feb 20 12:18:17 2017 +0100

deleting wrong pll files so nightlies can be happy

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-20 02:01:07 0:00:45 4eea5ce 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170220_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Mon Feb 20 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-19 02:01:05 0:00:42 4eea5ce 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170219_020105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sun Feb 19 02:01:04 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 02:01:21 0:00:49 4eea5ce 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170218_020121.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Sat Feb 18 02:01:21 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 02:01:22 0:00:41 4eea5ce 9627342 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170217_020122.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Fri Feb 17 02:01:22 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-16 02:01:04 0:00:42 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170216_020104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Thu Feb 16 02:01:04 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-15 02:01:07 0:00:44 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170215_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Wed Feb 15 02:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-14 02:01:07 0:00:44 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170214_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Tue Feb 14 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-13 02:01:07 0:00:44 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170213_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Mon Feb 13 02:01:07 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-12 02:01:07 0:00:44 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170212_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Sun Feb 12 02:01:07 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-11 02:01:06 0:00:43 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170211_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sat Feb 11 02:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-10 02:01:08 0:00:45 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170210_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Fri Feb 10 02:01:08 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-09 02:01:05 0:00:42 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170209_020105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Thu Feb 09 02:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-08 02:01:08 0:00:44 4eea5ce ab48262 N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170208_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Wed Feb 08 02:01:07 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-07 02:01:08 0:00:45 4eea5ce 6d928dd N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170207_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Feb 07 02:01:08 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 4eea5ce8b59b7b2064102b29721acc61ba767774
Author: unknown
Date: Mon Feb 6 11:49:50 2017 +0100

Improve monitoring, fifo depths, and timing closure

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-02-06 02:01:08 0:00:45 29059d9 733048d N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170206_020108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Mon Feb 06 02:01:08 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-05 02:01:13 0:00:44 29059d9 733048d N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170205_020113.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Sun Feb 05 02:01:12 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:56

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-04 02:01:10 0:00:47 29059d9 733048d N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170204_020110.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Feb 04 02:01:10 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:01:02

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-03 02:01:06 0:00:42 29059d9 733048d N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170203_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Fri Feb 03 02:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-02 02:01:07 0:00:44 29059d9 733048d N/A 1127 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170202_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Thu Feb 02 02:01:07 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-01 02:01:06 0:00:43 29059d9 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170201_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Wed Feb 01 02:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-31 02:01:05 0:00:43 29059d9 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170131_020105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Tue Jan 31 02:01:05 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:11

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-30 02:01:07 0:00:43 29059d9 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170130_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Mon Jan 30 02:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-29 02:01:06 0:00:45 29059d9 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170129_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sun Jan 29 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-28 02:01:07 0:00:46 29059d9 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170128_020107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Sat Jan 28 02:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit 29059d9e09af16c0db1fcfbafa05c1bc85e00c99
Author: unknown
Date: Fri Jan 27 13:10:57 2017 +0100

Update to 160Mhz

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 02:01:10 0:00:44 f07602d 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170127_020110.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Jan 27 02:01:09 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-26 02:01:06 0:00:44 f07602d 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170126_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Thu Jan 26 02:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:01:13

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-25 02:01:05 0:00:43 f07602d 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170125_020105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Wed Jan 25 02:01:05 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-24 02:01:03 0:00:41 f07602d 1abcab8 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170124_020103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Tue Jan 24 02:01:03 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:01:07

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 02:01:11 0:00:40 f07602d 6aed696 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170123_020111.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Jan 23 02:01:11 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:01:06

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-22 02:01:03 0:00:41 f07602d 6aed696 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170122_020103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Jan 22 02:01:03 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-21 02:01:03 0:00:40 f07602d 6aed696 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170121_020103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Sat Jan 21 02:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:01:08

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-20 02:01:03 0:00:42 f07602d 6aed696 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170120_020103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Fri Jan 20 02:01:03 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:01:07

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-19 02:01:02 0:00:40 f07602d 6aed696 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170119_020102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Jan 19 02:01:01 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:01:09

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-18 02:01:03 0:00:40 f07602d 04ac7d4 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20170118_020103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Wed Jan 18 02:01:02 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:01:07

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2016-12-15 02:01:33 0:00:58 f07602d f812395 N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161215_020133.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Thu Dec 15 02:01:33 2016
Error: Elapsed time: 00:00:55
Error: Total CPU time (on all processors): 00:00:40

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-13 02:01:52 0:01:05 f07602d e90ac0c N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161213_020152.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Tue Dec 13 02:01:52 2016
Error: Elapsed time: 00:01:01
Error: Total CPU time (on all processors): 00:00:39

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-12 02:01:46 0:01:01 f07602d e90ac0c N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161212_020146.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Mon Dec 12 02:01:46 2016
Error: Elapsed time: 00:00:58
Error: Total CPU time (on all processors): 00:00:41

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-11 02:01:06 0:00:45 f07602d e90ac0c N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161211_020106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 985 megabytes
Error: Processing ended: Sun Dec 11 02:01:06 2016
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:01:12

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-10 02:01:05 0:00:43 f07602d e90ac0c N/A 1125 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161210_020105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(719): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input1/RxRaw/Rx.vhd Line: 719
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sat Dec 10 02:01:04 2016
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:01:10

Firmware Git Logs

commit f07602d10947709d174e0d386994b36eccf60473
Author: unknown
Date: Fri Dec 9 11:47:30 2016 +0100

Fix register assigments to not overlap with hitsort enable. Also add fifo resets

commit 22b5623a87c8c46c0728beca15d87c059971ecf2
Author: unknown
Date: Thu Oct 27 12:14:21 2016 +0200

FORGOT TO ADD THE DAMN LONG PULSE TO THE OUTPUT OF THE SPY FREEEZ BLOCK

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-08 06:13:14 4:12:24 e4d68ea b113c0d 104732 4636 353 0 143.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161208_061314.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-07 12:58:08 10:56:27 e4d68ea b113c0d 102304 4636 345 0 138.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161207_125808.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-06 08:20:31 6:18:58 e4d68ea b113c0d 104702 4636 345 0 134.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161206_082031.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-05 02:44:37 0:43:39 e4d68ea b113c0d 1046EA 4635 345 0 141.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161205_024437.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19515 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-04 02:46:23 0:45:25 e4d68ea b113c0d 1046D2 4635 353 0 130.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161204_024623.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19549 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 07:57:48 5:56:27 e4d68ea b113c0d 1046BA 4636 345 0 135.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161203_075748.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Thu Mar 23 18:01:06 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-02 07:22:36 5:21:09 e4d68ea b113c0d 1046A2 4636 345 0 132.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161202_072236.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 10:54:45 8:53:18 e4d68ea b113c0d 10468A 4637 345 0 132.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161201_105445.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-30 05:01:30 2:59:23 e4d68ea b113c0d 104672 4636 345 0 135.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161130_050130.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-29 02:48:15 0:47:15 e4d68ea b113c0d 10465A 4635 345 0 124.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161129_024815.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-28 02:44:58 0:44:00 e4d68ea b113c0d 104642 4635 345 0 142.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161128_024458.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-27 02:45:14 0:44:14 e4d68ea b113c0d 10462A 4635 345 0 141.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161127_024514.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-26 02:52:04 0:47:14 e4d68ea b113c0d 104612 4635 345 0 138.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161126_025204.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14274 megabytes
Error: Processing ended: Wed Aug 10 20:21:07 2016
Error: Elapsed time: 05:29:49
Error: Total CPU time (on all processors): 09:23:00

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-25 02:44:26 0:43:28 e4d68ea b113c0d 1045FA 4635 345 0 137.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161125_024426.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-24 02:47:42 0:46:43 e4d68ea bb9d09b 1045E2 4635 345 0 134.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161124_024742.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb9d09b1fcac326152c629bf90bd01f6f007f221
Merge: bb3320f 40fb5c7
Author: FTK User
Date: Wed Nov 23 18:00:37 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 40fb5c78dc7da9fd78b9c675be6b0a9a3cef2ff1
Author: U-Chicago1\rzou
Date: Wed Nov 23 23:06:48 2016 +0100

A:q

A
A
A
B
:
B
B
tsort hold propagation
2016-11-23 02:44:19 0:43:22 e4d68ea bb3320f 1045CA 4635 345 0 145.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161123_024419.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-10-28 18:42:12 16:40:30 e4d68ea 337b57e 102304 4636 345 0 143.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161028_184212.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-27 08:49:01 6:47:32 e4d68ea 337b57e 104341 4637 345 0 137.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161027_084901.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19615 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 15:05:30 13:03:59 e4d68ea 337b57e 102304 4636 345 0 133.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161026_150530.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-25 13:03:06 11:01:32 e4d68ea c92deb1 102304 4640 336 0 119.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161025_130306.tar.bz2 .


Firmware Git Logs

commit e4d68ea6989a1d9a6e640aa8da9e0db9aa337b82
Author: unknown
Date: Mon Oct 24 17:15:28 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit c92deb1a6ca50f978487919c40415efc261ffebc
Merge: dcf31e5 800b606
Author: FTK User
Date: Mon Oct 24 12:01:36 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 800b606fe85acaa6c85e8ac01f3e5a59484f8753
Author: unknown
Date: Mon Oct 24 17:14:05 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR
2016-10-24 02:45:47 0:44:46 392d325 dcf31e5 1042F9 4635 336 0 120.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161024_024547.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Sun Mar 26 03:01:27 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-23 02:45:13 0:44:16 392d325 dcf31e5 1042E1 4635 336 0 144.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161023_024513.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-22 02:45:54 0:44:49 392d325 dcf31e5 1042C9 4635 336 0 135.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161022_024554.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-21 02:46:42 0:45:47 392d325 dcf31e5 1042B1 4635 336 0 140.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161021_024642.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-20 02:47:47 0:46:49 392d325 dcf31e5 104299 4635 336 0 145.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161020_024747.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-19 02:45:13 0:44:17 392d325 dcf31e5 104281 4635 336 0 134.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161019_024513.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-14 03:05:52 1:04:54 392d325 dcf31e5 104209 4635 336 0 139.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161014_030552.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-13 03:18:19 1:17:21 392d325 810d361 1041F1 4635 336 0 129.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161013_031819.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-12 03:07:07 1:06:16 392d325 810d361 1041D9 4635 336 0 123.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161012_030707.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-11 16:40:38 14:38:25 392d325 810d361 102304 4637 336 0 148.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161011_164038.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19521 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-10 03:12:53 1:11:56 392d325 810d361 1041A9 4635 336 0 142.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161010_031253.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19497 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-09 03:21:53 1:20:56 392d325 810d361 104191 4635 336 0 141.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161009_032153.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Nov 29 18:00:52 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-08 03:25:10 1:24:06 392d325 810d361 104179 4635 336 0 138.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161008_032510.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Wed Mar 01 21:01:14 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-07 03:11:19 1:10:20 392d325 810d361 104161 4635 336 0 145.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161007_031119.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Mon Nov 07 04:02:11 2016
Error: Elapsed time: 00:00:09
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-06 03:09:24 1:08:23 392d325 810d361 104149 4635 336 0 127.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161006_030924.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-05 03:12:31 1:11:33 392d325 810d361 104131 4635 336 0 130.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161005_031231.tar.bz2 .


Firmware Git Logs

commit 392d3258284ba272f9fd5f21fc270487e4f09e6b
Author: unknown
Date: Tue Oct 4 14:06:19 2016 +0200

move pll to RxLDC directory

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-01 02:01:07 0:00:04 5e043f5 7b8defc N/A 37 1 1 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20161001_020107.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit 5e043f5ecfeda991f0961e06125ad03f748ac43d
Author: unknown
Date: Fri Sep 30 16:21:38 2016 +0200

adding git and clock freq info

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 03:14:36 1:13:42 6d52e43 e61013c 1040A1 4638 329 0 129.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160929_031436.tar.bz2 .


Firmware Git Logs

commit 6d52e4300f7871b1ea807b02f3c39abea15dc5cc
Author: unknown
Date: Mon Sep 19 14:20:27 2016 +0200

quartus 16 RxLDC

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-16 02:37:14 0:36:00 937c670 4b63cf8 103C81 4648 332 0 121.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160816_023714.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 02:37:36 0:36:17 937c670 4b63cf8 103C09 4648 332 0 132.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160811_023736.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 02:35:59 0:34:42 937c670 4b63cf8 103BF1 4648 332 0 131.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160810_023559.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 02:40:13 0:38:56 937c670 4b63cf8 103BD9 4648 332 0 141.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160809_024013.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 02:39:28 0:38:08 937c670 4b63cf8 103BC1 4648 332 0 127.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160808_023928.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 02:37:45 0:36:28 937c670 4b63cf8 103BA9 4648 332 0 132.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160807_023745.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 04:36:24 2:35:09 937c670 4b63cf8 103B91 4649 332 0 126.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160806_043624.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 06:17:09 4:14:22 937c670 4b63cf8 103B79 4649 332 0 129.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160805_061709.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 08:08:26 6:06:04 937c670 4b63cf8 103B61 4649 332 0 136.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160804_080826.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 02:40:33 0:39:12 937c670 4b63cf8 103B49 4648 332 0 134.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160803_024033.tar.bz2 .


Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 02:36:56 0:35:40 937c670 4b63cf8 103B31 4648 332 0 136.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input1_RxRaw_20160802_023656.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19457 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 31 / 248 0%

Firmware Git Logs

commit 937c67066006d7cd4d12d5a648c56c82aa27b224
Author: unknown
Date: Wed Jun 29 10:48:00 2016 +0200

added freeze to DF

commit bb52d0382f936d63b702852ee2dcffbc957b78e5
Merge: 5c14ef6 0c742a8
Author: unknown
Date: Tue Jun 28 17:53:09 2016 +0200

Merge branch 'master' of eshop1.uchicago.edu:/nfs/net/designs/FTK/Input_1_8_9_13

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort


Input2_RxLDC

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2018-02-06 23:20:35 2:19:18 81fd8f0 591f0e7 2D6F1B 7738 1241 0 118.6/100.0 152.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20180206_232035.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 49696 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 81fd8f0f9d8c31caeb31f0dcbb013bb6a5fb7f72
Author: tseiss
Date: Fri Feb 2 08:19:45 2018 +0100

Added PMA ROM to basic fw

commit 3a8b5818f309bd19eae55e683f08eb94d56057b5
Author: tseiss
Date: Thu Feb 1 10:52:18 2018 +0100

Added PMA ROM configuration.

AUXCommon Git Logs

commit 591f0e79b42c98c6e170419c4836b7e5009db5d5
Author: tseiss
Date: Fri Feb 2 08:04:28 2018 +0100

Working version of xcvr/reconfig_controller for PMA

commit 4be01e10d10cf540dd80a7e7aea13fcccf63c708
Merge: ff5beca f2e2f88
Author: tseiss
Date: Thu Jan 25 18:07:33 2018 +0100

Merged in PMAallChannels
2017-04-12 22:36:16 1:34:56 5a1bfae 9ea10b2 2D52FC 5829 706 0 119.5/100.0 173.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170412_223616.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 22:37:23 1:36:04 5a1bfae 9ea10b2 2D52E4 5829 706 0 120.4/100.0 169.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170411_223723.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 22:36:10 1:34:47 5a1bfae 9ea10b2 2D52CC 5829 706 0 122.3/100.0 167.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170410_223610.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 22:35:10 1:33:51 5a1bfae 9ea10b2 2D52B4 5829 706 0 119.7/100.0 175.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170409_223510.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 22:37:17 1:36:00 5a1bfae 9ea10b2 2D529C 5829 708 0 116.7/100.0 169.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170408_223717.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 22:36:07 1:34:50 5a1bfae 9ea10b2 2D5284 5829 706 0 119.8/100.0 175.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170407_223607.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 22:37:24 1:36:01 5a1bfae 9ea10b2 2D526C 5829 706 0 116.8/100.0 166.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170406_223724.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 22:36:29 1:35:10 5a1bfae 9ea10b2 2D5254 5829 706 0 117.4/100.0 166.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170405_223629.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 22:33:56 1:32:35 5a1bfae 9ea10b2 2D523C 5829 706 0 118.7/100.0 171.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170404_223356.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-03 22:34:37 1:33:11 5a1bfae 9ea10b2 2D5224 5829 706 0 121.0/100.0 172.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170403_223437.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-02 22:33:38 1:32:38 5a1bfae 9ea10b2 2D520C 5829 706 0 121.1/100.0 175.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170402_223338.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-01 22:32:35 1:31:31 5a1bfae 9ea10b2 2D51F4 5829 706 0 118.6/100.0 173.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170401_223235.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-31 22:32:46 1:31:36 5a1bfae 9ea10b2 2D51DC 5829 706 0 123.2/100.0 176.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170331_223246.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-30 21:01:04 0:00:41 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170330_210104.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Thu Mar 30 21:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-29 21:01:05 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170329_210105.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Wed Mar 29 21:01:04 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-28 21:01:07 0:00:40 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170328_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Tue Mar 28 21:01:07 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-27 21:01:04 0:00:41 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170327_210104.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Mon Mar 27 21:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-25 21:01:04 0:00:40 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170325_210104.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Sat Mar 25 21:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-24 21:01:02 0:00:39 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170324_210102.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Fri Mar 24 21:01:02 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 21:01:02 0:00:40 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170322_210102.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Wed Mar 22 21:01:01 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 21:01:27 0:01:01 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170321_210127.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Tue Mar 21 21:01:26 2017
Error: Elapsed time: 00:00:55
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 21:01:07 0:00:42 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170320_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Mon Mar 20 21:01:07 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 21:01:08 0:00:42 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170319_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Sun Mar 19 21:01:07 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 21:01:08 0:00:42 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170318_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Sat Mar 18 21:01:08 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-17 21:01:07 0:00:42 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170317_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Fri Mar 17 21:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 21:01:11 0:00:45 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170315_210111.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 963 megabytes
Error: Processing ended: Wed Mar 15 21:01:11 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 21:01:07 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170314_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Tue Mar 14 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 21:01:13 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170313_210113.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Mon Mar 13 21:01:12 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 21:01:06 0:00:44 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170312_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Sun Mar 12 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 21:01:06 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170311_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sat Mar 11 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 21:01:08 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170310_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Fri Mar 10 21:01:07 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 21:01:07 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170309_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Thu Mar 09 21:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 21:01:06 0:00:43 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170308_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 963 megabytes
Error: Processing ended: Wed Mar 08 21:01:05 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-07 21:01:19 0:00:44 94d159c 9ea10b2 N/A 1323 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170307_210119.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Tue Mar 07 21:01:18 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-06 21:01:08 0:00:43 e1bda7f 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170306_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Mon Mar 06 21:01:07 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-05 21:01:07 0:00:43 e1bda7f 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170305_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sun Mar 05 21:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-04 21:01:06 0:00:42 e1bda7f 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170304_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sat Mar 04 21:01:05 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-03 21:01:07 0:00:43 e1bda7f 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170303_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Fri Mar 03 21:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-02 21:01:06 0:00:45 e1bda7f 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170302_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Thu Mar 02 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-01 21:01:14 0:00:44 e1bda7f 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170301_210114.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Wed Mar 01 21:01:14 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-28 21:01:07 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170228_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Tue Feb 28 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-27 21:01:07 0:00:43 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170227_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Mon Feb 27 21:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-26 21:01:07 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170226_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sun Feb 26 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-25 21:01:08 0:00:46 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170225_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Sat Feb 25 21:01:08 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-24 21:01:08 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170224_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 963 megabytes
Error: Processing ended: Fri Feb 24 21:01:08 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-23 21:01:07 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170223_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Thu Feb 23 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-22 21:01:07 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170222_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Wed Feb 22 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-21 21:01:08 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170221_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 963 megabytes
Error: Processing ended: Tue Feb 21 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-20 21:01:07 0:00:44 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170220_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Mon Feb 20 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-19 21:01:04 0:00:41 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170219_210104.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Sun Feb 19 21:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 21:01:07 0:00:43 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170218_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Sat Feb 18 21:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 21:01:43 0:00:47 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170217_210143.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Fri Feb 17 21:01:42 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-16 21:01:32 0:00:43 7b9147b 9627342 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170216_210132.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Thu Feb 16 21:01:31 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-15 21:01:07 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170215_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Wed Feb 15 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-14 21:01:07 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170214_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Tue Feb 14 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-13 21:01:08 0:00:45 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170213_210108.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Mon Feb 13 21:01:08 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-12 21:01:06 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170212_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Sun Feb 12 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-11 21:01:06 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170211_210106.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Sat Feb 11 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-10 21:01:07 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170210_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Fri Feb 10 21:01:06 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-09 21:01:07 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170209_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Thu Feb 09 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-08 21:01:12 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170208_210112.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Wed Feb 08 21:01:11 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-07 21:01:07 0:00:44 f752801 ab48262 N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170207_210107.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 963 megabytes
Error: Processing ended: Tue Feb 07 21:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-06 21:02:27 0:00:50 f752801 6d928dd N/A 1302 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170206_210227.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Mon Feb 06 21:02:27 2017
Error: Elapsed time: 00:00:44
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-02-05 22:36:24 1:35:09 6a8ca1b 733048d 2D4CCD 5590 653 0 119.6/100.0 172.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170205_223624.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-04 22:43:02 1:41:47 6a8ca1b 733048d 2D4CB5 5590 653 0 120.4/100.0 162.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170204_224302.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 34493 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-03 22:42:10 1:40:59 6a8ca1b 733048d 2D4C9D 5590 653 0 122.0/100.0 168.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170203_224210.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-02 22:39:12 1:38:03 6a8ca1b 733048d 2D4C85 5590 653 0 119.5/100.0 167.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170202_223912.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-01 22:38:13 1:37:07 6a8ca1b 733048d 2D4C6D 5590 653 0 121.1/100.0 157.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170201_223813.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-01-31 22:35:04 1:33:56 6a8ca1b 1abcab8 2D4C55 5583 655 0 119.5/100.0 171.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170131_223504.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-30 22:35:13 1:34:05 6a8ca1b 1abcab8 2D4C3D 5583 655 0 120.0/100.0 170.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170130_223513.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-29 22:33:35 1:32:27 6a8ca1b 1abcab8 2D4C25 5583 655 0 117.2/100.0 175.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170129_223335.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-28 22:32:08 1:31:01 6a8ca1b 1abcab8 2D4C0D 5583 655 0 118.8/100.0 171.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170128_223208.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 22:37:58 1:36:44 6a8ca1b 1abcab8 2D4BF5 5583 655 0 117.3/100.0 167.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170127_223758.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-26 22:35:22 1:34:11 6a8ca1b 1abcab8 2D4BDD 5583 655 0 119.7/100.0 155.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170126_223522.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-25 22:35:35 1:34:32 6a8ca1b 1abcab8 2D4BC5 5583 655 0 115.3/100.0 165.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170125_223535.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-24 22:36:44 1:35:37 6a8ca1b 1abcab8 2D4BAD 5583 655 0 119.8/100.0 167.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170124_223644.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33426 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 22:29:39 1:28:37 6a8ca1b 1abcab8 2D4B95 5583 655 0 117.2/100.0 170.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170123_222939.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-22 22:30:24 1:29:10 6a8ca1b 6aed696 2D4B7D 5583 655 0 120.1/100.0 164.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170122_223024.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-21 22:31:27 1:30:22 6a8ca1b 6aed696 2D4B65 5583 655 0 117.1/100.0 158.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170121_223127.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-20 22:27:56 1:26:50 6a8ca1b 6aed696 2D4B4D 5583 655 0 113.4/100.0 166.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170120_222756.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-19 22:28:14 1:27:17 6a8ca1b 6aed696 2D4B35 5583 655 0 119.1/100.0 166.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170119_222814.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-18 22:29:57 1:29:00 6a8ca1b 6aed696 2D4B1D 5583 655 0 121.8/100.0 169.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170118_222957.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-17 22:28:51 1:27:48 6a8ca1b 04ac7d4 2D4B05 5583 655 0 119.9/100.0 172.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170117_222851.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-16 22:36:56 1:35:53 6a8ca1b 04ac7d4 2D4AED 5583 655 0 119.1/100.0 172.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170116_223656.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-15 22:38:39 1:37:29 6a8ca1b f812395 2D4AD5 5583 655 0 120.2/100.0 174.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170115_223839.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-14 22:39:53 1:38:45 6a8ca1b f812395 2D4ABD 5583 655 0 118.3/100.0 167.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170114_223953.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-13 22:45:21 1:42:29 6a8ca1b f812395 2D4AA5 5583 655 0 124.0/100.0 173.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170113_224521.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-12 22:38:02 1:36:41 6a8ca1b f812395 2D4A8D 5583 655 0 119.9/100.0 174.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170112_223802.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-11 22:35:23 1:34:21 6a8ca1b f812395 2D4A75 5583 655 0 117.1/100.0 170.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170111_223523.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-10 22:35:46 1:34:41 6a8ca1b f812395 2D4A5D 5583 655 0 120.9/100.0 173.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170110_223546.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-09 22:39:42 1:38:34 6a8ca1b f812395 2D4A45 5583 655 0 116.8/100.0 163.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170109_223942.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33339 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-08 22:35:42 1:34:35 6a8ca1b f812395 2D4A2D 5583 655 0 116.5/100.0 179.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170108_223542.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-07 22:38:16 1:37:07 6a8ca1b f812395 2D4A15 5583 655 0 123.0/100.0 172.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170107_223816.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 22:37:47 1:36:36 6a8ca1b f812395 2D49FD 5583 655 0 115.8/100.0 172.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170106_223747.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-05 22:33:48 1:32:39 6a8ca1b f812395 2D49E5 5583 655 0 118.6/100.0 169.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170105_223348.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-04 22:15:31 1:14:34 6a8ca1b f812395 2D49CD 5583 655 0 120.6/100.0 164.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170104_221531.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Tue Oct 11 04:01:39 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-03 22:15:44 1:14:42 6a8ca1b f812395 2D49B5 5583 655 0 116.7/100.0 166.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170103_221544.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-02 22:14:59 1:14:01 6a8ca1b f812395 2D499D 5583 655 0 119.0/100.0 173.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170102_221459.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-01 22:14:18 1:13:21 6a8ca1b f812395 2D4985 5583 655 0 118.6/100.0 171.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20170101_221418.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 22:27:11 1:26:16 6a8ca1b f812395 2D496D 5583 655 0 116.2/100.0 167.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161231_222711.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 06:17:31 9:16:30 6a8ca1b f812395 2D4735 5584 655 0 117.5/100.0 165.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161231_061731.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-29 22:38:44 1:37:36 6a8ca1b f812395 2D493D 5583 655 0 119.5/100.0 168.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161229_223844.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33344 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-28 22:14:13 1:13:11 6a8ca1b f812395 2D4925 5583 655 0 119.7/100.0 172.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161228_221413.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33335 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 22:14:09 1:13:12 6a8ca1b f812395 2D490D 5583 655 0 117.9/100.0 162.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161227_221409.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33336 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 03:52:24 6:51:16 6a8ca1b f812395 2D4735 5585 655 0 114.5/100.0 167.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161227_035224.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33299 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-25 22:14:00 1:13:03 6a8ca1b f812395 2D48DD 5583 655 0 120.8/100.0 173.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161225_221400.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-24 22:20:02 1:19:04 6a8ca1b f812395 2D48C5 5583 655 0 122.4/100.0 172.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161224_222002.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-23 22:15:00 1:13:40 6a8ca1b f812395 2D48AD 5583 655 0 115.2/100.0 160.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161223_221500.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 22:13:49 1:12:55 6a8ca1b f812395 2D4895 5583 655 0 119.9/100.0 168.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161222_221349.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 00:49:21 3:48:26 6a8ca1b f812395 2D4735 5584 655 0 116.9/100.0 174.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161222_004921.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-20 22:19:43 1:18:42 6a8ca1b f812395 2D4865 5583 655 0 114.2/100.0 174.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161220_221943.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33287 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-19 22:11:21 1:10:27 6a8ca1b f812395 2D484D 5583 655 0 116.4/100.0 175.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161219_221121.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-18 22:09:25 1:08:27 6a8ca1b f812395 2D4835 5583 655 0 120.7/100.0 165.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161218_220925.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-17 22:13:40 1:12:47 6a8ca1b f812395 2D481D 5583 655 0 116.8/100.0 176.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161217_221340.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-16 22:10:45 1:09:48 6a8ca1b f812395 2D4805 5583 655 0 117.5/100.0 171.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161216_221045.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-15 23:27:19 2:26:20 6a8ca1b f812395 2D4735 5583 655 0 116.0/100.0 162.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161215_232719.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-12 21:01:08 0:00:34 6a57a82 e90ac0c N/A 1301 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161212_210108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1100): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLDC/Rx.vhd Line: 1100
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 967 megabytes
Error: Processing ended: Mon Dec 12 21:01:07 2016
Error: Elapsed time: 00:00:27
Error: Total CPU time (on all processors): 00:00:07

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-10 21:01:04 0:00:42 6a57a82 e90ac0c N/A 1301 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161210_210104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1100): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLDC/Rx.vhd Line: 1100
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sat Dec 10 21:01:04 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-09 21:01:04 0:00:41 6a57a82 e90ac0c N/A 1301 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161209_210104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1100): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLDC/Rx.vhd Line: 1100
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Fri Dec 09 21:01:03 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-08 21:01:18 0:00:36 6a57a82 fa16ef3 N/A 1301 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161208_210118.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1100): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLDC/Rx.vhd Line: 1100
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 966 megabytes
Error: Processing ended: Thu Dec 08 21:01:18 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:07

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit fa16ef360dba35f2b735acfd645c62c9daabe657
Merge: b113c0d b6482ae
Author: FTK User
Date: Thu Dec 8 12:00:59 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit b6482ae100a7e48adf09d638c2b4f762787c2631
Merge: fe5cf0a 174ec1d
Author: unknown
Date: Thu Dec 8 15:25:52 2016 +0100

Merge remote-tracking branch 'origin/master'

Conflicts:
ssmap/tcl/tb_SSMapPixelLayer.do
2016-12-07 23:15:16 2:14:24 6a57a82 b113c0d 2D41F4 5584 655 0 116.5/100.0 168.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161207_231516.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-07 11:34:36 14:33:34 6a57a82 b113c0d 2D41F4 5584 655 0 115.1/100.0 176.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161207_113436.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33198 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-06 05:20:20 8:19:27 6a57a82 b113c0d 2D41F4 5585 655 0 120.2/100.0 169.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161206_052020.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-04 22:16:23 1:15:25 6a57a82 b113c0d 2D46E5 5583 655 0 121.1/100.0 173.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161204_221623.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33344 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 22:32:38 1:31:41 6a57a82 b113c0d 2D46CD 5583 655 0 122.3/100.0 173.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161203_223238.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 03:06:23 6:05:25 6a57a82 b113c0d 2D41F4 5584 657 0 119.1/100.0 173.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161203_030623.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 23:55:36 2:54:45 6a57a82 b113c0d 2D41F4 5583 655 0 122.4/100.0 167.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161201_235536.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 08:56:06 11:55:11 6a57a82 b113c0d 2D41F4 5584 655 0 116.5/100.0 171.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161201_085606.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-30 10:02:44 13:01:46 6a57a82 b113c0d 2D41F4 5584 655 0 116.3/100.0 178.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161130_100244.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33135 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-28 22:13:47 1:12:50 6a57a82 b113c0d 2D4655 5583 655 0 113.3/100.0 169.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161128_221347.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-27 22:16:00 1:15:02 6a57a82 b113c0d 2D463D 5583 655 0 119.2/100.0 169.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161127_221600.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-26 22:14:44 1:13:50 6a57a82 b113c0d 2D4625 5583 655 0 121.6/100.0 176.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161126_221444.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-25 22:15:24 1:14:24 6a57a82 b113c0d 2D460D 5583 655 0 118.1/100.0 170.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161125_221524.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 959 megabytes
Error: Processing ended: Mon Feb 13 22:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-24 22:25:28 1:24:31 6a57a82 b113c0d 2D45F5 5583 655 0 118.9/100.0 166.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161124_222528.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33276 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-23 22:12:28 1:11:31 6a57a82 bb9d09b 2D45DD 5583 655 0 120.2/100.0 173.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161123_221228.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33222 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb9d09b1fcac326152c629bf90bd01f6f007f221
Merge: bb3320f 40fb5c7
Author: FTK User
Date: Wed Nov 23 18:00:37 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 40fb5c78dc7da9fd78b9c675be6b0a9a3cef2ff1
Author: U-Chicago1\rzou
Date: Wed Nov 23 23:06:48 2016 +0100

A:q

A
A
A
B
:
B
B
tsort hold propagation
2016-11-22 22:13:46 1:12:48 6a57a82 bb3320f 2D45C5 5583 655 0 121.0/100.0 165.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161122_221346.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-21 22:19:28 1:18:31 6a57a82 bb3320f 2D45AD 5583 655 0 117.0/100.0 174.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161121_221928.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Feb 06 03:01:42 2017
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-20 22:17:02 1:16:02 6a57a82 bb3320f 2D4595 5583 655 0 119.9/100.0 178.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161120_221702.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-19 22:18:37 1:17:38 6a57a82 bb3320f 2D457D 5583 655 0 121.0/100.0 170.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161119_221837.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-18 22:14:07 1:13:09 6a57a82 bb3320f 2D4565 5583 655 0 118.6/100.0 173.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161118_221407.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33189 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-17 22:12:06 1:11:10 6a57a82 bb3320f 2D454D 5583 655 0 112.8/100.0 160.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161117_221206.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-16 22:14:52 1:13:55 6a57a82 bb3320f 2D4535 5583 655 0 117.4/100.0 173.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161116_221452.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-15 22:14:00 1:13:04 6a57a82 bb3320f 2D451D 5583 655 0 117.5/100.0 175.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161115_221400.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-14 22:09:40 1:08:45 6a57a82 bb3320f 2D4505 5583 655 0 123.1/100.0 174.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161114_220940.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-13 22:08:56 1:08:02 6a57a82 11f885e 2D44ED 5583 655 0 118.5/100.0 176.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161113_220856.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-12 22:11:07 1:10:10 6a57a82 11f885e 2D44D5 5583 655 0 121.1/100.0 170.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161112_221107.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33191 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-11 22:10:45 1:09:47 6a57a82 11f885e 2D44BD 5583 655 0 117.9/100.0 177.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161111_221045.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-10 22:12:06 1:11:08 6a57a82 11f885e 2D44A5 5583 655 0 114.5/100.0 175.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161110_221206.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33161 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-09 22:10:44 1:09:50 6a57a82 11f885e 2D448D 5583 655 0 122.8/100.0 172.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161109_221044.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 22:10:48 1:09:53 6a57a82 11f885e 2D4475 5583 655 0 117.7/100.0 178.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161108_221048.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 00:46:39 3:45:48 6a57a82 337b57e 2D41F4 5575 655 0 113.1/100.0 171.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161108_004639.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-07 12:20:17 15:19:08 6a57a82 337b57e 2D41F4 5576 655 0 120.3/100.0 178.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161107_122017.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-06 09:08:40 13:07:43 6a57a82 337b57e 2D41F4 5575 655 0 117.7/100.0 175.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161106_090840.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-05 01:12:55 4:11:47 6a57a82 337b57e 2D41F4 5575 655 0 116.1/100.0 171.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161105_011255.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-03 23:06:30 2:05:40 6a57a82 337b57e 2D41F4 5574 655 0 116.8/100.0 162.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161103_230630.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-02 22:10:04 1:09:06 6a57a82 337b57e 2D43E4 5574 655 0 121.5/100.0 176.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161102_221004.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-01 22:11:28 1:10:30 6a57a82 337b57e 2D43CC 5574 655 0 115.6/100.0 172.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161101_221128.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-31 22:35:56 1:32:32 6a57a82 337b57e 2D43B4 5574 655 0 120.2/100.0 167.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161031_223556.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-29 10:02:55 13:02:03 6a57a82 337b57e 2D436C 5576 655 0 121.5/100.0 172.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161029_100255.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-28 10:06:05 13:05:09 6a57a82 337b57e 2D41F4 5576 655 0 115.9/100.0 166.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161028_100605.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-27 03:04:59 6:04:05 6a57a82 337b57e 2D41F4 5575 655 0 121.8/100.0 167.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161027_030459.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 08:10:17 11:09:22 6a57a82 337b57e 2D41F4 5575 655 0 119.7/100.0 172.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161026_081017.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-25 08:56:09 11:55:13 6a57a82 c92deb1 2D41F4 5576 655 0 123.1/100.0 175.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161025_085609.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit c92deb1a6ca50f978487919c40415efc261ffebc
Merge: dcf31e5 800b606
Author: FTK User
Date: Mon Oct 24 12:01:36 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 800b606fe85acaa6c85e8ac01f3e5a59484f8753
Author: unknown
Date: Mon Oct 24 17:14:05 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR
2016-10-23 22:13:41 1:12:47 e7d5ad4 dcf31e5 2D42F4 5574 654 0 121.6/100.0 175.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161023_221341.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32784 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-22 22:14:50 1:13:55 e7d5ad4 dcf31e5 2D42DC 5574 654 0 116.9/100.0 180.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161022_221450.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-21 22:14:57 1:14:03 e7d5ad4 dcf31e5 2D42C4 5574 654 0 118.5/100.0 176.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161021_221457.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-20 22:12:07 1:11:12 e7d5ad4 dcf31e5 2D42AC 5574 654 0 119.8/100.0 168.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161020_221207.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-19 22:14:11 1:13:16 e7d5ad4 dcf31e5 2D4294 5574 654 0 114.8/100.0 177.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161019_221411.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32891 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-18 22:12:02 1:11:08 e7d5ad4 dcf31e5 2D427C 5574 654 0 120.9/100.0 177.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161018_221202.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-17 22:11:35 1:10:39 e7d5ad4 dcf31e5 2D4264 5574 654 0 119.3/100.0 170.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161017_221135.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32776 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-16 22:09:15 1:08:19 e7d5ad4 dcf31e5 2D424C 5574 654 0 116.9/100.0 167.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161016_220915.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32865 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-15 22:10:35 1:09:43 e7d5ad4 dcf31e5 2D4234 5574 654 0 121.7/100.0 171.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161015_221035.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32820 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-13 22:15:11 1:14:12 e7d5ad4 dcf31e5 2D4204 5574 654 0 117.4/100.0 166.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161013_221511.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32880 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-12 22:15:15 1:14:14 e7d5ad4 810d361 2D41EC 5574 654 0 119.2/100.0 165.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161012_221515.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32733 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-12 00:16:28 3:15:33 e7d5ad4 810d361 2D411C 5576 654 0 115.7/100.0 174.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161012_001628.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-11 12:40:39 15:39:48 e7d5ad4 810d361 2D411C 5575 654 0 120.6/100.0 172.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161011_124039.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32784 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-09 22:15:08 1:14:07 e7d5ad4 810d361 2D41A4 5574 654 0 118.3/100.0 176.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161009_221508.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-08 22:13:35 1:12:39 e7d5ad4 810d361 2D418C 5574 654 0 115.7/100.0 172.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161008_221335.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-07 22:14:19 1:13:20 e7d5ad4 810d361 2D4174 5574 654 0 120.2/100.0 172.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161007_221419.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-06 22:14:56 1:13:56 e7d5ad4 810d361 2D415C 5574 654 0 120.3/100.0 174.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161006_221456.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-05 22:13:57 1:13:02 e7d5ad4 810d361 2D4144 5574 654 0 116.5/100.0 177.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161005_221357.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32835 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-04 22:13:54 1:12:50 e7d5ad4 810d361 2D412C 5574 654 0 119.4/100.0 176.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20161004_221354.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-28 22:33:15 1:32:13 96142e2 e61013c 2D409C 5564 654 0 121.6/100.0 182.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160928_223315.tar.bz2 .


Firmware Git Logs

commit 96142e2c4032cdd7ce9149e6ec822c3763eb8a62
Author: unknown
Date: Mon Sep 19 14:23:33 2016 +0200

quartus 16 RxROS

commit 07d3b599bfd8e42f099adcdcd22f7245194a8d9a
Author: unknown
Date: Mon Sep 19 14:15:55 2016 +0200

quartus 16 RxLDC

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-15 21:59:37 0:58:32 dffacfd 4b63cf8 2D3C7C 5576 768 0 118.8/100.0 157.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160815_215937.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 22:04:13 1:03:04 dffacfd 4b63cf8 2D3C64 5576 768 0 124.3/100.0 161.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160814_220413.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 22:03:21 1:02:11 dffacfd 4b63cf8 2D3C4C 5576 768 0 118.5/100.0 170.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160813_220321.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32651 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 21:59:57 0:58:49 dffacfd 4b63cf8 2D3C34 5576 768 0 116.4/100.0 168.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160812_215957.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32530 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 22:08:24 1:07:11 dffacfd 4b63cf8 2D3C1C 5576 768 0 120.1/100.0 176.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160811_220824.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 22:05:43 1:04:25 dffacfd 4b63cf8 2D3C04 5576 768 0 121.5/100.0 167.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160810_220543.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 22:07:23 1:06:14 dffacfd 4b63cf8 2D3BEC 5576 768 0 121.5/100.0 178.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160809_220723.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 22:08:10 1:06:51 dffacfd 4b63cf8 2D3BD4 5576 768 0 120.2/100.0 177.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160808_220810.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Feb 17 18:01:56 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 22:07:24 1:06:16 dffacfd 4b63cf8 2D3BBC 5576 768 0 119.0/100.0 170.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160807_220724.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 22:02:41 1:01:28 dffacfd 4b63cf8 2D3BA4 5576 768 0 119.8/100.0 174.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160806_220241.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 00:34:32 3:33:27 dffacfd 4b63cf8 2D37EF 5577 768 0 114.1/100.0 157.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160806_003432.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 04:47:43 7:45:29 dffacfd 4b63cf8 2D37EF 5577 768 0 115.2/100.0 177.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160805_044743.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 23:27:11 2:25:59 dffacfd 4b63cf8 2D37EF 5577 768 0 118.8/100.0 174.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160803_232711.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 22:08:54 1:07:33 dffacfd 4b63cf8 2D3B44 5576 768 0 117.5/100.0 173.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160802_220854.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 22:22:44 1:21:25 dffacfd 4b63cf8 2D3B14 5576 768 0 118.2/100.0 162.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160731_222244.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 23:18:30 2:17:15 dffacfd 4b63cf8 2D37EF 5577 768 0 118.9/100.0 160.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160730_231830.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 22:05:30 1:04:13 dffacfd 4b63cf8 2D3AE4 5576 768 0 121.8/100.0 172.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160729_220530.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 22:04:16 1:03:02 dffacfd 4b63cf8 2D3ACC 5576 768 0 121.0/100.0 177.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160728_220416.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32585 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 22:25:35 1:24:16 dffacfd 4b63cf8 2D3AB4 5576 768 0 119.5/100.0 162.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160727_222535.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 22:05:19 1:04:02 dffacfd 4b63cf8 2D3A9C 5576 768 0 116.6/100.0 169.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160726_220519.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32640 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 22:11:48 1:10:33 dffacfd 4b63cf8 2D3A84 5576 768 0 118.6/100.0 176.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160725_221148.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 22:21:10 1:19:55 dffacfd 4b63cf8 2D3A6C 5576 768 0 119.8/100.0 168.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160724_222110.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 23:02:47 2:01:36 dffacfd 4b63cf8 2D37EF 5577 768 0 112.2/100.0 172.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160723_230247.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32586 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 22:26:36 1:25:18 dffacfd 4b63cf8 2D3A3C 5576 768 0 122.2/100.0 162.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160722_222636.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 23:01:06 1:59:52 dffacfd 4b63cf8 2D37EF 5577 768 0 116.1/100.0 172.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160721_230106.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 22:09:44 1:08:38 dffacfd 4b63cf8 2D3A0C 5576 768 0 109.7/100.0 167.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160720_220944.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-19 21:57:35 0:56:21 dffacfd 4b63cf8 2D39F4 5576 768 0 118.1/100.0 165.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160719_215735.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 21:55:35 0:54:22 dffacfd 4b63cf8 2D39DC 5576 768 0 118.9/100.0 173.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160718_215535.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32555 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 21:55:22 0:54:14 dffacfd 4b63cf8 2D39C4 5576 768 0 117.1/100.0 178.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160717_215522.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32602 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 22:00:54 0:59:41 dffacfd 4b63cf8 2D39AC 5576 768 0 118.8/100.0 166.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160716_220054.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 22:15:58 1:14:47 dffacfd 4b63cf8 2D3994 5576 768 0 117.4/100.0 165.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160715_221558.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 22:08:26 1:07:18 dffacfd 4b63cf8 2D397C 5576 768 0 110.9/100.0 161.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160714_220826.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 22:10:17 1:09:06 dffacfd 4b63cf8 2D3964 5576 768 0 117.4/100.0 161.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160713_221017.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 22:09:06 1:08:02 dffacfd 4b63cf8 2D394C 5576 768 0 123.3/100.0 168.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160712_220906.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 960 megabytes
Error: Processing ended: Fri Feb 10 22:01:06 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 22:05:17 1:03:57 dffacfd 4b63cf8 2D3934 5576 768 0 122.5/100.0 172.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160711_220517.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Oct 25 18:00:53 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 22:06:02 1:04:40 dffacfd 4b63cf8 2D391C 5576 768 0 122.8/100.0 170.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160710_220602.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32557 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 22:11:41 1:10:19 dffacfd 4b63cf8 2D3904 5576 768 0 118.7/100.0 172.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160709_221141.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32661 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 22:08:06 1:06:42 dffacfd 4b63cf8 2D38EC 5576 768 0 119.5/100.0 170.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160708_220806.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 22:10:33 1:09:28 dffacfd 4b63cf8 2D38D4 5576 768 0 113.3/100.0 169.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160707_221033.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 22:11:30 1:10:07 dffacfd 4b63cf8 2D38BC 5576 768 0 120.8/100.0 166.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160706_221130.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 11:03:23 14:00:36 dffacfd 4b63cf8 2D37EF 5577 768 0 115.0/100.0 168.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160706_110323.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-05 08:48:26 11:46:53 dffacfd 4b63cf8 2D37EF 5578 768 0 124.8/100.0 166.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160705_084826.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Tue Mar 07 21:01:18 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 01:50:22 4:49:04 dffacfd 4b63cf8 2D37EF 5578 768 0 121.6/100.0 172.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160704_015022.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-03 07:47:07 10:45:21 dffacfd 4b63cf8 2D37EF 5577 768 0 121.2/100.0 167.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160703_074707.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 05:33:52 8:32:15 dffacfd 4b63cf8 2D37EF 5577 769 0 121.0/100.0 171.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160702_053352.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32609 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 21:27:52 0:09:23 dffacfd 4b63cf8 N/A 4287 709 0 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160630_212752.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 0 / 0 -
Total DSP Blocks 0 / 0 -
Horizontal periphery clocks and Vertical periphery clocks 0 / 0 -

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 01:07:15 4:06:07 dffacfd 4b63cf8 2D37EF 5577 768 0 115.4/100.0 167.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160630_010715.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 32574 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 01:19:05 4:17:32 dffacfd 4b63cf8 2D37EF 5577 768 0 112.8/100.0 174.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160629_011905.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-27 23:17:01 2:15:55 cb64735 04f33a4 2D2441 5577 768 0 113.0/100.0 172.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLDC_20160627_231701.tar.bz2 .


Firmware Git Logs

commit cb647354ae8dd2b6a22f90f3f30a5043b6df39fc
Author: Jamie Saxon
Date: Fri May 6 16:07:10 2016 -0700

analog settings for Tx4_6Gbps_reco2

commit 21512243c90b123d5d0e8659440367ac4ce3b66a
Author: FTK User
Date: Mon Feb 22 12:36:30 2016 -0800

raw at 100 MHz

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Input2_RxLSC

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-03-20 23:01:07 0:00:42 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20170320_230107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(909): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Rx.vhd Line: 909
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 965 megabytes
Error: Processing ended: Mon Mar 20 23:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:07

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 23:01:02 0:00:37 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20170319_230102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(909): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Rx.vhd Line: 909
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Sun Mar 19 23:01:02 2017
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:08

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-16 23:01:04 0:00:38 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20170316_230104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(909): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Rx.vhd Line: 909
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Thu Mar 16 23:01:04 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:06

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 23:01:09 0:00:36 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20170315_230109.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(909): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Rx.vhd Line: 909
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 965 megabytes
Error: Processing ended: Wed Mar 15 23:01:08 2017
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:08

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 23:01:01 0:00:37 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20170312_230101.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(909): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Rx.vhd Line: 909
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Sun Mar 12 23:01:00 2017
Error: Elapsed time: 00:00:33
Error: Total CPU time (on all processors): 00:00:07

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-11 23:01:14 0:00:02 e7d5ad4 810d361 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20161011_230114.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Tue Oct 11 23:01:14 2016
Error: Elapsed time: 00:00:02
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-10 23:01:35 0:00:03 e7d5ad4 810d361 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20161010_230135.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Oct 10 23:01:34 2016
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-28 23:48:46 0:47:27 96142e2 e61013c 2A409E 4657 247 0 118.6/100.0 192.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160928_234846.tar.bz2 .


Firmware Git Logs

commit 96142e2c4032cdd7ce9149e6ec822c3763eb8a62
Author: unknown
Date: Mon Sep 19 14:23:33 2016 +0200

quartus 16 RxROS

commit 07d3b599bfd8e42f099adcdcd22f7245194a8d9a
Author: unknown
Date: Mon Sep 19 14:15:55 2016 +0200

quartus 16 RxLDC

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-15 23:41:20 0:40:07 dffacfd 4b63cf8 2A3C7E 4667 242 0 119.5/100.0 188.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160815_234120.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 23:34:43 0:33:34 dffacfd 4b63cf8 2A3C66 4667 242 0 122.8/100.0 181.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160814_233443.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(909): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Rx.vhd Line: 909
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 962 megabytes
Error: Processing ended: Sun Mar 12 23:01:00 2017
Error: Elapsed time: 00:00:33
Error: Total CPU time (on all processors): 00:00:07

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 23:38:17 0:37:10 dffacfd 4b63cf8 2A3C4E 4667 242 0 121.0/100.0 180.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160813_233817.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 23:32:55 0:31:53 dffacfd 4b63cf8 2A3C36 4667 242 0 119.7/100.0 188.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160812_233255.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 23:49:01 0:47:41 dffacfd 4b63cf8 2A3C1E 4667 242 0 117.0/100.0 180.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160811_234901.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 23:36:24 0:35:18 dffacfd 4b63cf8 2A3C06 4667 242 0 123.3/100.0 176.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160810_233624.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 23:54:27 0:53:11 dffacfd 4b63cf8 2A3BEE 4667 242 0 120.0/100.0 191.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160809_235427.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 23:44:43 0:43:36 dffacfd 4b63cf8 2A3BD6 4667 242 0 116.1/100.0 187.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160808_234443.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 00:54:33 1:52:52 dffacfd 4b63cf8 2A3BBE 4667 242 0 120.0/100.0 191.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160808_005433.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 23:36:57 0:35:46 dffacfd 4b63cf8 2A3BA6 4667 242 0 119.5/100.0 187.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160806_233657.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 01:15:17 2:13:39 dffacfd 4b63cf8 2A2031 4667 242 0 124.4/100.0 189.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160806_011517.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 23:45:07 0:43:47 dffacfd 4b63cf8 2A3B76 4667 242 0 124.2/100.0 192.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160804_234507.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 02:03:57 3:01:42 dffacfd 4b63cf8 2A2031 4668 242 0 120.7/100.0 181.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160804_020357.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Wed Mar 22 01:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 23:39:09 0:38:00 dffacfd 4b63cf8 2A3B46 4667 242 0 122.6/100.0 190.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160802_233909.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18540 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 23:35:00 0:33:47 dffacfd 4b63cf8 2A3B2E 4667 242 0 115.3/100.0 182.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160801_233500.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 23:35:32 0:34:13 dffacfd 4b63cf8 2A3B16 4667 242 0 114.3/100.0 191.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160731_233532.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 23:39:07 0:37:58 dffacfd 4b63cf8 2A3AFE 4667 242 0 124.8/100.0 188.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160730_233907.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 23:39:01 0:37:54 dffacfd 4b63cf8 2A3AE6 4667 242 0 118.2/100.0 197.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160729_233901.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 23:36:51 0:35:45 dffacfd 4b63cf8 2A3ACE 4667 242 0 118.3/100.0 182.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160728_233651.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 23:38:23 0:37:14 dffacfd 4b63cf8 2A3AB6 4667 242 0 119.1/100.0 188.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160727_233823.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 23:40:29 0:39:25 dffacfd 4b63cf8 2A3A9E 4667 242 0 117.6/100.0 184.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160726_234029.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18579 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 23:38:11 0:37:05 dffacfd 4b63cf8 2A3A86 4667 242 0 119.3/100.0 190.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160725_233811.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 23:36:56 0:35:46 dffacfd 4b63cf8 2A3A6E 4667 242 0 120.7/100.0 194.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160724_233656.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 23:45:14 0:44:11 dffacfd 4b63cf8 2A3A56 4667 242 0 121.0/100.0 187.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160723_234514.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 439 megabytes
Error: Processing ended: Sat Dec 03 03:01:05 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 23:35:54 0:34:12 dffacfd 4b63cf8 2A3A3E 4667 242 0 120.2/100.0 179.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160722_233554.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 23:36:27 0:35:24 dffacfd 4b63cf8 2A3A26 4667 242 0 124.3/100.0 180.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160721_233627.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 23:36:08 0:34:51 dffacfd 4b63cf8 2A3A0E 4667 242 0 122.6/100.0 188.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160720_233608.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-19 23:34:58 0:33:38 dffacfd 4b63cf8 2A39F6 4667 242 0 123.9/100.0 178.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160719_233458.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 23:35:20 0:34:15 dffacfd 4b63cf8 2A39DE 4667 242 0 125.2/100.0 180.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160718_233520.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 23:33:29 0:32:27 dffacfd 4b63cf8 2A39C6 4667 242 0 117.9/100.0 187.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160717_233329.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 23:38:04 0:36:59 dffacfd 4b63cf8 2A39AE 4667 242 0 120.9/100.0 193.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160716_233804.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 00:08:43 1:07:37 dffacfd 4b63cf8 2A3996 4667 242 0 115.1/100.0 182.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160716_000843.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18530 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 23:47:32 0:46:06 dffacfd 4b63cf8 2A397E 4667 242 0 120.9/100.0 185.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160714_234732.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 00:15:39 1:14:13 dffacfd 4b63cf8 2A3966 4667 242 0 116.1/100.0 197.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160714_001539.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 01:11:06 2:08:22 dffacfd 4b63cf8 2A2031 4667 242 0 122.0/100.0 178.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160713_011106.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 23:53:45 0:52:20 dffacfd 4b63cf8 2A3936 4667 242 0 121.1/100.0 184.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160711_235345.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input1/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input1/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 961 megabytes
Error: Processing ended: Tue Feb 14 22:01:06 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 23:55:49 0:54:20 dffacfd 4b63cf8 2A391E 4667 242 0 112.2/100.0 192.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160710_235549.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 00:08:29 1:07:18 dffacfd 4b63cf8 2A3906 4667 242 0 123.2/100.0 178.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160710_000829.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1100): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLDC/Rx.vhd Line: 1100
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 967 megabytes
Error: Processing ended: Mon Dec 12 21:01:07 2016
Error: Elapsed time: 00:00:27
Error: Total CPU time (on all processors): 00:00:07

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 23:54:29 0:53:07 dffacfd 4b63cf8 2A38EE 4667 242 0 122.7/100.0 191.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160708_235429.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 23:51:14 0:49:51 dffacfd 4b63cf8 2A38D6 4667 242 0 119.8/100.0 181.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160707_235114.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18470 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 00:12:03 1:10:25 dffacfd 4b63cf8 2A38BE 4667 242 0 124.4/100.0 186.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160707_001203.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 10:11:22 11:06:00 dffacfd 4b63cf8 2A2031 4668 242 0 121.5/100.0 190.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160706_101122.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18603 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-05 07:10:45 8:08:30 dffacfd 4b63cf8 2A2031 4668 242 0 119.8/100.0 196.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160705_071045.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 03:05:07 4:03:42 dffacfd 4b63cf8 2A2031 4668 242 0 120.3/100.0 182.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160704_030507.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-03 05:55:04 6:53:27 dffacfd 4b63cf8 2A2031 4668 242 0 118.9/100.0 179.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160703_055504.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 07:58:02 8:56:06 dffacfd 4b63cf8 2A2031 4668 243 0 122.8/100.0 189.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160702_075802.tar.bz2 .

Analysis Errors

Error (10430): VHDL Primary Unit Declaration error at pll_main.vhd(11): primary unit "pll_main" already exists in library "pll_main". Compile the two primary units into different libraries or assign them unique names. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number. File: D:/Projects/ftk/Nightlies/Input2/RxLDC/pll_main.vhd Line: 11
Error (10784): HDL error at pll_main.vhd(11): see declaration for object "pll_main" File: D:/Projects/ftk/Nightlies/Input2/pll_main.vhd Line: 11
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 964 megabytes
Error: Processing ended: Sun Feb 19 21:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 23:54:49 0:53:35 dffacfd 4b63cf8 2A382E 4667 242 0 123.6/100.0 190.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160630_235449.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 01:33:40 2:32:14 dffacfd 4b63cf8 2A2031 4667 242 0 118.2/100.0 178.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160630_013340.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 18413 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 07:00:55 7:58:43 dffacfd 4b63cf8 2A2031 4668 242 0 115.9/100.0 185.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160629_070055.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-27 23:02:08 0:01:17 cb64735 04f33a4 N/A 1112 2 9 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxLSC_20160627_230208.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxBlock.vhd(231): formal port or parameter "pma_write" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Gx/GxBlock.vhd Line: 231
Error (10784): HDL error at Xcvr_GenData.vhd(18): see declaration for object "pma_write" File: D:/Projects/ftk/Nightlies/Input2/Gx/Xcvr_GenData.vhd Line: 18
Error (10346): VHDL error at GxBlock.vhd(231): formal port or parameter "pma_setting" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxLSC/Gx/GxBlock.vhd Line: 231
Error (10784): HDL error at Xcvr_GenData.vhd(19): see declaration for object "pma_setting" File: D:/Projects/ftk/Nightlies/Input2/Gx/Xcvr_GenData.vhd Line: 19
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 4 errors, 3 warnings
Error: Peak virtual memory: 805 megabytes
Error: Processing ended: Tue Jun 28 07:02:06 2016
Error: Elapsed time: 00:01:15
Error: Total CPU time (on all processors): 00:00:06

Firmware Git Logs

commit cb647354ae8dd2b6a22f90f3f30a5043b6df39fc
Author: Jamie Saxon
Date: Fri May 6 16:07:10 2016 -0700

analog settings for Tx4_6Gbps_reco2

commit 21512243c90b123d5d0e8659440367ac4ce3b66a
Author: FTK User
Date: Mon Feb 22 12:36:30 2016 -0800

raw at 100 MHz

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Input2_RxROS

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-03-31 03:01:28 0:00:50 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170331_030128.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Fri Mar 31 03:01:28 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-30 03:01:22 0:00:48 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170330_030122.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Mar 30 03:01:22 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-29 03:01:24 0:00:48 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170329_030124.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Mar 29 03:01:24 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-27 03:01:24 0:00:47 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170327_030124.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Mon Mar 27 03:01:24 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-26 03:01:28 0:00:47 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170326_030128.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Sun Mar 26 03:01:27 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-25 03:01:22 0:00:44 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170325_030122.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Mar 25 03:01:21 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-24 03:01:29 0:00:47 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170324_030129.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Fri Mar 24 03:01:28 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-23 03:01:29 0:00:52 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170323_030129.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Thu Mar 23 03:01:29 2017
Error: Elapsed time: 00:00:45
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 03:04:09 0:03:25 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170322_030409.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 972 megabytes
Error: Processing ended: Wed Mar 22 03:04:09 2017
Error: Elapsed time: 00:03:06
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 03:01:42 0:00:52 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170321_030142.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Tue Mar 21 03:01:42 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 03:01:38 0:00:51 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170320_030138.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Mon Mar 20 03:01:38 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 03:01:46 0:00:56 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170319_030146.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Mar 19 03:01:46 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 03:02:11 0:01:07 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170318_030211.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Mar 18 03:02:11 2017
Error: Elapsed time: 00:00:51
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-17 03:02:01 0:00:47 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170317_030201.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Fri Mar 17 03:02:00 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:08

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 03:01:37 0:00:50 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170315_030137.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Wed Mar 15 03:01:37 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 03:02:18 0:00:53 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170314_030218.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Tue Mar 14 03:02:17 2017
Error: Elapsed time: 00:00:44
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 03:01:38 0:00:53 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170313_030138.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Mon Mar 13 03:01:37 2017
Error: Elapsed time: 00:00:44
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 03:01:11 0:00:49 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170312_030111.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 983 megabytes
Error: Processing ended: Sun Mar 12 03:01:11 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 03:01:36 0:00:53 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170311_030136.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 986 megabytes
Error: Processing ended: Sat Mar 11 03:01:35 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 03:01:38 0:00:51 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170310_030138.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Fri Mar 10 03:01:37 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 03:01:38 0:00:54 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170309_030138.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Thu Mar 09 03:01:38 2017
Error: Elapsed time: 00:00:45
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 03:01:45 0:00:59 94d159c 9ea10b2 N/A 1557 4 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170308_030145.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Wed Mar 08 03:01:44 2017
Error: Elapsed time: 00:00:50
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-02-25 03:01:19 0:00:09 7b9147b 9627342 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170225_030119.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Sat Feb 25 03:01:19 2017
Error: Elapsed time: 00:00:09
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 03:01:03 0:00:12 7b9147b 9627342 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170218_030103.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Sat Feb 18 03:01:02 2017
Error: Elapsed time: 00:00:12
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 03:01:29 0:00:10 7b9147b 9627342 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170217_030129.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Fri Feb 17 03:01:29 2017
Error: Elapsed time: 00:00:10
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-06 03:01:43 0:00:05 6a8ca1b 733048d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170206_030143.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Feb 06 03:01:42 2017
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-01-14 03:01:30 0:00:07 6a8ca1b f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170114_030130.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Sat Jan 14 03:01:30 2017
Error: Elapsed time: 00:00:07
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-11 03:01:05 0:00:04 6a8ca1b f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170111_030105.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Wed Jan 11 03:01:04 2017
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-07 03:01:34 0:00:08 6a8ca1b f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20170107_030134.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Sat Jan 07 03:01:33 2017
Error: Elapsed time: 00:00:08
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-03 03:01:05 0:00:04 6a57a82 b113c0d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161203_030105.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 439 megabytes
Error: Processing ended: Sat Dec 03 03:01:05 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 03:01:31 0:00:06 6a57a82 b113c0d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161201_030131.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Thu Dec 01 03:01:30 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-07 03:02:48 0:00:06 6a57a82 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161107_030248.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Mon Nov 07 03:02:47 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-06 03:01:19 0:00:04 6a57a82 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161106_030119.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Sun Nov 06 03:01:19 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-28 03:01:29 0:00:03 6a57a82 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161028_030129.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Fri Oct 28 03:01:29 2016
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-27 03:01:04 0:00:03 6a57a82 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161027_030104.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Thu Oct 27 03:01:03 2016
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 03:01:10 0:00:06 6a57a82 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161026_030110.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Wed Oct 26 03:01:10 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-11 03:01:34 0:00:05 e7d5ad4 810d361 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20161011_030134.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Tue Oct 11 03:01:33 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 04:15:12 1:14:01 96142e2 e61013c 2E40A2 5979 753 0 122.4/100.0 169.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160929_041512.tar.bz2 .


Firmware Git Logs

commit 96142e2c4032cdd7ce9149e6ec822c3763eb8a62
Author: unknown
Date: Mon Sep 19 14:23:33 2016 +0200

quartus 16 RxROS

commit 07d3b599bfd8e42f099adcdcd22f7245194a8d9a
Author: unknown
Date: Mon Sep 19 14:15:55 2016 +0200

quartus 16 RxLDC

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-16 04:03:29 1:02:08 dffacfd 4b63cf8 2E3C82 5990 929 0 118.6/100.0 171.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160816_040329.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-15 04:02:25 1:01:08 dffacfd 4b63cf8 2E3C6A 5990 929 0 120.9/100.0 174.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160815_040225.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33067 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 04:02:57 1:01:36 dffacfd 4b63cf8 2E3C52 5990 929 0 126.1/100.0 173.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160814_040257.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Mar 25 18:01:02 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 04:00:00 0:58:35 dffacfd 4b63cf8 2E3C3A 5990 929 0 121.1/100.0 178.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160813_040000.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 04:04:24 1:03:04 dffacfd 4b63cf8 2E3C22 5990 929 0 129.4/100.0 171.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160812_040424.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 04:02:25 1:01:09 dffacfd 4b63cf8 2E3C0A 5990 929 0 122.0/100.0 172.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160811_040225.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33092 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 04:06:36 1:05:19 dffacfd 4b63cf8 2E3BF2 5990 929 0 123.7/100.0 171.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160810_040636.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 04:08:58 1:07:35 dffacfd 4b63cf8 2E3BDA 5990 929 0 124.2/100.0 178.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160809_040858.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 04:07:15 1:05:54 dffacfd 4b63cf8 2E3BC2 5990 929 0 122.7/100.0 165.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160808_040715.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 04:03:48 1:02:26 dffacfd 4b63cf8 2E3BAA 5990 929 0 127.7/100.0 169.4/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160807_040348.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 04:19:26 1:18:14 dffacfd 4b63cf8 2E3B92 5990 929 0 118.7/100.0 173.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160806_041926.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33073 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 11:27:10 8:25:50 dffacfd 4b63cf8 2E3B7A 5991 929 0 125.7/100.0 167.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160805_112710.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 07:50:30 4:49:00 dffacfd 4b63cf8 2E3B62 5991 929 0 120.9/100.0 175.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160804_075030.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 04:07:17 1:05:56 dffacfd 4b63cf8 2E3B4A 5990 929 0 129.0/100.0 175.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160803_040717.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 04:03:12 1:01:46 dffacfd 4b63cf8 2E3B32 5990 929 0 121.0/100.0 170.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160802_040312.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 04:03:23 1:01:58 dffacfd 4b63cf8 2E3B1A 5990 929 0 128.2/100.0 183.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160801_040323.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 04:02:51 1:01:33 dffacfd 4b63cf8 2E3B02 5990 929 0 124.8/100.0 175.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160731_040251.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 04:01:27 1:00:10 dffacfd 4b63cf8 2E3AEA 5990 929 0 119.1/100.0 171.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160730_040127.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33121 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 04:04:06 1:02:44 dffacfd 4b63cf8 2E3AD2 5990 929 0 120.1/100.0 176.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160729_040406.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 04:05:00 1:03:43 dffacfd 4b63cf8 2E3ABA 5990 929 0 118.5/100.0 158.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160728_040500.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 04:02:21 1:01:06 dffacfd 4b63cf8 2E3AA2 5990 929 0 120.3/100.0 172.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160727_040221.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 04:02:02 1:00:46 dffacfd 4b63cf8 2E3A8A 5990 929 0 119.3/100.0 163.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160726_040202.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 04:01:02 0:59:47 dffacfd 4b63cf8 2E3A72 5990 929 0 122.0/100.0 176.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160725_040102.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 33054 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 04:02:18 1:01:02 dffacfd 4b63cf8 2E3A42 5990 929 0 116.3/100.0 168.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160723_040218.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 04:00:03 0:58:46 dffacfd 4b63cf8 2E3A2A 5990 929 0 122.7/100.0 175.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160722_040003.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 04:03:07 1:01:49 dffacfd 4b63cf8 2E3A12 5990 929 0 122.0/100.0 180.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160721_040307.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 05:45:51 2:44:09 dffacfd 4b63cf8 2E39FA 5990 929 0 124.0/100.0 174.8/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160720_054551.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-19 03:58:34 0:57:21 dffacfd 4b63cf8 2E39E2 5990 929 0 120.9/100.0 168.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160719_035834.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 04:01:51 1:00:36 dffacfd 4b63cf8 2E39B2 5990 929 0 124.7/100.0 168.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160717_040151.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 04:27:50 1:26:16 dffacfd 4b63cf8 2E399A 5990 929 0 125.6/100.0 164.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160716_042750.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 04:22:47 1:21:20 dffacfd 4b63cf8 2E3982 5990 929 0 127.1/100.0 170.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160715_042247.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 04:23:45 1:21:34 dffacfd 4b63cf8 2E396A 5990 929 0 121.0/100.0 176.2/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160714_042345.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 439 megabytes
Error: Processing ended: Sat Feb 18 04:01:05 2017
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 04:25:23 1:23:45 dffacfd 4b63cf8 2E3952 5990 929 0 121.6/100.0 170.0/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160713_042523.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 04:23:04 1:21:30 dffacfd 4b63cf8 2E393A 5990 929 0 116.8/100.0 172.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160712_042304.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 04:23:43 1:22:05 dffacfd 4b63cf8 2E3922 5990 929 0 119.1/100.0 177.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160711_042343.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 04:22:34 1:20:59 dffacfd 4b63cf8 2E390A 5990 929 0 117.9/100.0 165.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160710_042234.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 04:22:41 1:21:09 dffacfd 4b63cf8 2E38F2 5990 929 0 121.6/100.0 169.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160709_042241.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 04:22:19 1:20:45 dffacfd 4b63cf8 2E38DA 5990 929 0 122.6/100.0 176.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160708_042219.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 04:19:04 1:17:38 dffacfd 4b63cf8 2E38C2 5990 929 0 120.2/100.0 160.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160707_041904.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 11:12:44 8:08:46 dffacfd 4b63cf8 2E38AA 5992 929 0 122.6/100.0 171.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160706_111244.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-05 16:44:29 13:41:50 dffacfd 4b63cf8 2E3892 5991 929 0 125.7/100.0 160.9/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160705_164429.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 06:09:44 3:07:29 dffacfd 4b63cf8 2E387A 5990 929 0 129.2/100.0 172.1/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160704_060944.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-03 12:38:40 9:36:24 dffacfd 4b63cf8 2E3862 5991 929 0 121.0/100.0 179.6/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160703_123840.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 09:23:04 6:20:24 dffacfd 4b63cf8 2E384A 5991 929 0 124.4/100.0 168.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160702_092304.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-01 04:08:32 1:07:10 dffacfd 4b63cf8 2E3832 5990 929 0 126.4/100.0 172.5/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160701_040832.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 04:02:28 1:01:09 dffacfd 4b63cf8 2E381A 5990 929 0 123.8/100.0 171.3/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160630_040228.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 11:27:31 8:25:27 dffacfd 4b63cf8 2E3802 5991 929 0 116.5/100.0 174.7/160.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160629_112731.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-28 03:01:11 0:00:44 cb64735 04f33a4 N/A 1518 3 9 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxROS_20160628_030111.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxBlock.vhd(225): formal port or parameter "pma_write" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Gx/GxBlock.vhd Line: 225
Error (10784): HDL error at Xcvr_GenData.vhd(18): see declaration for object "pma_write" File: D:/Projects/ftk/Nightlies/Input2/Gx/Xcvr_GenData.vhd Line: 18
Error (10346): VHDL error at GxBlock.vhd(225): formal port or parameter "pma_setting" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Gx/GxBlock.vhd Line: 225
Error (10784): HDL error at Xcvr_GenData.vhd(19): see declaration for object "pma_setting" File: D:/Projects/ftk/Nightlies/Input2/Gx/Xcvr_GenData.vhd Line: 19
Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 4 errors, 4 warnings
Error: Peak virtual memory: 837 megabytes
Error: Processing ended: Tue Jun 28 11:01:11 2016
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit cb647354ae8dd2b6a22f90f3f30a5043b6df39fc
Author: Jamie Saxon
Date: Fri May 6 16:07:10 2016 -0700

analog settings for Tx4_6Gbps_reco2

commit 21512243c90b123d5d0e8659440367ac4ce3b66a
Author: FTK User
Date: Mon Feb 22 12:36:30 2016 -0800

raw at 100 MHz

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Input2_RxRaw

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2018-02-06 13:13:37 1:15:19 81fd8f0 591f0e7 206F11 5043 772 0 115.0/100.0 225.9/200.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20180206_131337.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23354 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 81fd8f0f9d8c31caeb31f0dcbb013bb6a5fb7f72
Author: tseiss
Date: Fri Feb 2 08:19:45 2018 +0100

Added PMA ROM to basic fw

commit 3a8b5818f309bd19eae55e683f08eb94d56057b5
Author: tseiss
Date: Thu Feb 1 10:52:18 2018 +0100

Added PMA ROM configuration.

AUXCommon Git Logs

commit 591f0e79b42c98c6e170419c4836b7e5009db5d5
Author: tseiss
Date: Fri Feb 2 08:04:28 2018 +0100

Working version of xcvr/reconfig_controller for PMA

commit 4be01e10d10cf540dd80a7e7aea13fcccf63c708
Merge: ff5beca f2e2f88
Author: tseiss
Date: Thu Jan 25 18:07:33 2018 +0100

Merged in PMAallChannels
2017-04-29 01:03:22 FAILED
2017-04-22 01:01:44 FAILED
2017-04-13 01:54:21 0:53:04 5a1bfae 9ea10b2 205300 4760 515 0 119.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170413_015421.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-12 01:53:57 0:52:37 5a1bfae 9ea10b2 2052E8 4760 515 0 123.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170412_015357.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 01:52:16 0:50:59 5a1bfae 9ea10b2 2052D0 4760 515 0 121.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170411_015216.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 01:51:37 0:50:23 5a1bfae 9ea10b2 2052B8 4760 515 0 117.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170410_015137.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 01:53:03 0:51:41 5a1bfae 9ea10b2 2052A0 4760 515 0 117.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170409_015303.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 01:52:53 0:51:33 5a1bfae 9ea10b2 205288 4760 515 0 119.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170408_015253.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 01:52:53 0:51:33 5a1bfae 9ea10b2 205270 4760 515 0 124.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170407_015253.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 01:53:24 0:52:01 5a1bfae 9ea10b2 205258 4760 515 0 122.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170406_015324.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 01:52:10 0:50:53 5a1bfae 9ea10b2 205240 4760 515 0 121.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170405_015210.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 01:54:49 0:53:29 5a1bfae 9ea10b2 205228 4760 515 0 117.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170404_015449.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-03 01:54:27 0:53:23 5a1bfae 9ea10b2 205210 4760 515 0 120.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170403_015427.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-02 01:53:15 0:52:14 5a1bfae 9ea10b2 2051F8 4760 515 0 120.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170402_015315.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-01 01:58:08 0:52:19 5a1bfae 9ea10b2 2051E0 4760 519 0 117.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170401_015808.tar.bz2 .


Firmware Git Logs

commit 5a1bfaef9a5eea840f4f5751e25a33e63035524b
Author: Chicago1\rzou
Date: Fri Mar 31 17:59:32 2017 +0200

fixing nightly compiles for RxRaw

commit dbe4220ce5a92c2e2e4fb69b658c5c55f47431c1
Merge: 31be204 94d159c
Author: U-Chicago1\rzou
Date: Fri Mar 31 17:49:14 2017 +0200

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Input2_150406

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-31 01:01:06 0:00:37 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170331_010106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Fri Mar 31 01:01:06 2017
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-26 01:01:01 0:00:38 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170326_010101.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sun Mar 26 01:01:01 2017
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-24 01:01:01 0:00:37 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170324_010101.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Fri Mar 24 01:01:00 2017
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 01:01:03 0:00:39 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170322_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Wed Mar 22 01:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 01:01:05 0:00:40 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170321_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Tue Mar 21 01:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 01:01:05 0:00:40 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170320_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 971 megabytes
Error: Processing ended: Mon Mar 20 01:01:04 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 01:01:05 0:00:40 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170319_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sun Mar 19 01:01:05 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 01:01:05 0:00:39 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170318_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 967 megabytes
Error: Processing ended: Sat Mar 18 01:01:04 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-17 01:01:21 0:00:38 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170317_010121.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Fri Mar 17 01:01:21 2017
Error: Elapsed time: 00:00:33
Error: Total CPU time (on all processors): 00:00:06

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 01:01:05 0:00:41 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170315_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Wed Mar 15 01:01:04 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 01:01:05 0:00:41 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170314_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Tue Mar 14 01:01:05 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 01:01:02 0:00:40 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170313_010102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Mon Mar 13 01:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 01:01:03 0:00:41 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170312_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sun Mar 12 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 01:01:04 0:00:41 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170311_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Sat Mar 11 01:01:04 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 01:01:04 0:00:41 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170310_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Fri Mar 10 01:01:04 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 01:01:04 0:00:41 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170309_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Thu Mar 09 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 01:01:03 0:00:40 94d159c 9ea10b2 N/A 1122 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170308_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Wed Mar 08 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 94d159c568436036d98142b7aa96db4c9452e6b1
Author: unknown
Date: Thu Mar 2 15:34:12 2017 +0100

added resets and hw monitoring

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-07 01:01:04 0:00:41 e1bda7f 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170307_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 967 megabytes
Error: Processing ended: Tue Mar 07 01:01:04 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-06 01:01:04 0:00:41 e1bda7f 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170306_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Mon Mar 06 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-05 01:01:03 0:00:41 e1bda7f 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170305_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 971 megabytes
Error: Processing ended: Sun Mar 05 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-04 01:01:03 0:00:42 e1bda7f 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170304_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 971 megabytes
Error: Processing ended: Sat Mar 04 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-03 01:01:03 0:00:41 e1bda7f 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170303_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Fri Mar 03 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-02 01:01:01 0:00:39 e1bda7f 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170302_010101.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Thu Mar 02 01:01:01 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit e1bda7f6b88556c88828c6db9f2bd4607b173d5a
Author: unknown
Date: Wed Mar 1 14:29:36 2017 +0100

fix some fifo depths

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-01 01:01:03 0:00:40 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170301_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Wed Mar 01 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-28 01:01:04 0:00:43 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170228_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Tue Feb 28 01:01:04 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-27 01:01:03 0:00:41 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170227_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Mon Feb 27 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-26 01:01:04 0:00:42 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170226_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Sun Feb 26 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-25 01:01:04 0:00:41 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170225_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sat Feb 25 01:01:04 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-24 01:01:03 0:00:41 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170224_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 967 megabytes
Error: Processing ended: Fri Feb 24 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-23 01:01:04 0:00:41 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170223_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Thu Feb 23 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-22 01:01:04 0:00:41 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170222_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Wed Feb 22 01:01:04 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-21 01:01:07 0:00:43 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170221_010107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Tue Feb 21 01:01:07 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-20 01:01:03 0:00:40 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170220_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 970 megabytes
Error: Processing ended: Mon Feb 20 01:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-19 01:01:11 0:00:43 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170219_010111.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 966 megabytes
Error: Processing ended: Sun Feb 19 01:01:11 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 01:01:10 0:00:40 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170218_010110.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Sat Feb 18 01:01:09 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 01:01:06 0:00:40 7b9147b 9627342 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170217_010106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Fri Feb 17 01:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 7b9147b7efaaca5fa7e348b3f1cd2762625e2343
Author: unknown
Date: Thu Feb 16 21:24:04 2017 +0100

fixes to monitoring

commit b4b0c12c99840c7c59506e1be5259a373bf96f00
Author: unknown
Date: Wed Feb 15 23:58:52 2017 +0100

lots of HW bug fixes

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-16 01:01:03 0:00:41 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170216_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 971 megabytes
Error: Processing ended: Thu Feb 16 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-15 01:01:04 0:00:41 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170215_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Wed Feb 15 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-14 01:01:03 0:00:41 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170214_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Tue Feb 14 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-13 01:01:05 0:00:42 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170213_010105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 971 megabytes
Error: Processing ended: Mon Feb 13 01:01:05 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-12 01:01:03 0:00:41 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170212_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sun Feb 12 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-11 01:01:03 0:00:42 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170211_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sat Feb 11 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-10 01:01:04 0:00:40 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170210_010104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Fri Feb 10 01:01:03 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-09 01:01:03 0:00:41 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170209_010103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Thu Feb 09 01:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-08 01:01:02 0:00:40 f752801 ab48262 N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170208_010102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Wed Feb 08 01:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-07 01:01:07 0:00:42 f752801 6d928dd N/A 1121 3 7 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170207_010107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Tue Feb 07 01:01:06 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit f75280112febc73ad8cc9df82d735e26d87ed8ad
Author: unknown
Date: Mon Feb 6 11:49:19 2017 +0100

Improve monitoring and fifo depths

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-02-06 01:55:09 0:53:52 6a8ca1b 733048d 204CD1 4621 480 0 118.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170206_015509.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-05 01:55:01 0:53:54 6a8ca1b 733048d 204CB9 4621 480 0 116.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170205_015501.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-04 02:01:43 1:00:31 6a8ca1b 733048d 204CA1 4621 480 0 116.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170204_020143.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-03 01:56:28 0:55:22 6a8ca1b 733048d 204C89 4621 480 0 122.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170203_015628.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-02 01:55:54 0:54:49 6a8ca1b 733048d 204C71 4621 480 0 124.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170202_015554.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-01 01:54:28 0:53:21 6a8ca1b 1abcab8 204C59 4617 480 0 120.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170201_015428.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-31 01:53:37 0:52:34 6a8ca1b 1abcab8 204C41 4617 480 0 121.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170131_015337.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-30 01:52:26 0:51:20 6a8ca1b 1abcab8 204C29 4617 480 0 120.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170130_015226.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Feb 16 18:01:08 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-29 01:54:22 0:53:15 6a8ca1b 1abcab8 204C11 4617 480 0 117.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170129_015422.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-28 01:55:12 0:54:03 6a8ca1b 1abcab8 204BF9 4617 480 0 116.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170128_015512.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20134 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 01:54:11 0:53:01 6a8ca1b 1abcab8 204BE1 4617 480 0 120.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170127_015411.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-26 01:55:49 0:54:40 6a8ca1b 1abcab8 204BC9 4617 480 0 117.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170126_015549.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-25 01:55:56 0:54:48 6a8ca1b 1abcab8 204BB1 4617 480 0 117.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170125_015556.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-24 01:53:24 0:52:20 6a8ca1b 1abcab8 204B99 4617 480 0 118.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170124_015324.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 01:54:26 0:53:10 6a8ca1b 6aed696 204B81 4617 480 0 122.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170123_015426.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-22 01:52:41 0:51:37 6a8ca1b 6aed696 204B69 4617 480 0 119.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170122_015241.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20097 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-21 01:52:52 0:51:47 6a8ca1b 6aed696 204B51 4617 480 0 119.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170121_015252.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-20 01:56:07 0:55:00 6a8ca1b 6aed696 204B39 4617 480 0 120.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170120_015607.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-19 01:57:22 0:56:14 6a8ca1b 6aed696 204B21 4617 480 0 119.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170119_015722.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-18 01:55:00 0:53:55 6a8ca1b 04ac7d4 204B09 4617 480 0 121.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170118_015500.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-17 01:57:01 0:55:53 6a8ca1b 04ac7d4 204AF1 4617 480 0 122.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170117_015701.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-16 01:58:14 0:57:04 6a8ca1b f812395 204AD9 4617 480 0 126.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170116_015814.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-15 01:57:26 0:56:22 6a8ca1b f812395 204AC1 4617 480 0 122.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170115_015726.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20109 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-14 01:57:40 0:56:29 6a8ca1b f812395 204AA9 4617 480 0 119.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170114_015740.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-13 01:58:46 0:57:36 6a8ca1b f812395 204A91 4617 480 0 122.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170113_015846.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-12 01:56:47 0:55:27 6a8ca1b f812395 204A79 4617 480 0 123.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170112_015647.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-11 01:56:52 0:55:44 6a8ca1b f812395 204A61 4617 480 0 120.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170111_015652.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-10 01:59:10 0:58:00 6a8ca1b f812395 204A49 4617 480 0 119.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170110_015910.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20124 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-09 01:56:28 0:55:19 6a8ca1b f812395 204A31 4617 480 0 118.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170109_015628.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20009 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-08 01:54:39 0:53:33 6a8ca1b f812395 204A19 4617 480 0 120.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170108_015439.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-07 01:56:27 0:54:43 6a8ca1b f812395 204A01 4617 481 0 119.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170107_015627.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 01:53:04 0:51:56 6a8ca1b f812395 2049E9 4617 480 0 119.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170106_015304.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-05 01:44:44 0:43:46 6a8ca1b f812395 2049D1 4617 484 0 120.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170105_014444.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Mon Oct 24 12:01:43 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-04 01:44:47 0:43:47 6a8ca1b f812395 2049B9 4617 480 0 119.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170104_014447.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-03 01:42:33 0:41:39 6a8ca1b f812395 2049A1 4617 480 0 117.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170103_014233.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20101 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-02 01:42:58 0:42:00 6a8ca1b f812395 204989 4617 480 0 123.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170102_014258.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20112 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-01 01:44:10 0:43:11 6a8ca1b f812395 204971 4617 480 0 115.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20170101_014410.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Sat Dec 31 18:00:48 2016
Error: Elapsed time: 00:00:28
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 06:44:41 5:43:39 6a8ca1b f812395 2047DC 4618 480 0 119.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161231_064441.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-30 01:47:57 0:46:59 6a8ca1b f812395 204941 4617 480 0 118.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161230_014757.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-29 01:42:41 0:41:43 6a8ca1b f812395 204929 4617 480 0 119.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161229_014241.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-28 01:43:40 0:42:46 6a8ca1b f812395 204911 4617 480 0 125.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161228_014340.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 03:55:43 2:54:26 6a8ca1b f812395 2047DC 4617 480 0 121.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161227_035543.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-26 01:43:12 0:42:17 6a8ca1b f812395 2048E1 4617 480 0 116.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161226_014312.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20132 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-25 01:41:46 0:40:53 6a8ca1b f812395 2048C9 4617 480 0 119.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161225_014146.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-24 01:44:13 0:43:16 6a8ca1b f812395 2048B1 4617 480 0 120.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161224_014413.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-23 01:42:47 0:41:48 6a8ca1b f812395 204899 4617 480 0 117.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161223_014247.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 01:46:04 0:45:09 6a8ca1b f812395 204881 4617 480 0 118.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161222_014604.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-21 01:42:53 0:41:56 6a8ca1b f812395 204869 4617 480 0 122.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161221_014253.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-20 01:41:08 0:40:14 6a8ca1b f812395 204851 4617 480 0 119.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161220_014108.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-19 01:42:11 0:41:18 6a8ca1b f812395 204839 4617 488 0 121.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161219_014211.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sun Nov 13 18:00:57 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-18 01:42:12 0:41:18 6a8ca1b f812395 204821 4617 480 0 113.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161218_014212.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-17 01:40:27 0:39:34 6a8ca1b f812395 204809 4617 480 0 121.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161217_014027.tar.bz2 .


Firmware Git Logs

commit 6a8ca1bc89800a86c434ab3493b1021ee6d7d963
Author: unknown
Date: Thu Dec 15 13:51:48 2016 +0100

get RxRaw back up and running. Remove holdfromsfp stuff as new RxBasic uses it as a freeze

commit a5186e500452a879f52c57fd53a5b083d5b20902
Author: unknown
Date: Fri Dec 9 11:47:03 2016 +0100

Fix register assigments to not overlap with hitsort enable

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-16 12:37:47 FAILED
2016-11-30 02:18:31 1:17:25 6a57a82 b113c0d 204671 4616 480 0 117.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161130_021831.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-29 01:43:11 0:42:14 6a57a82 b113c0d 204659 4616 480 0 121.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161129_014311.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-28 01:44:06 0:43:13 6a57a82 b113c0d 204641 4616 480 0 118.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161128_014406.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-27 01:44:46 0:43:52 6a57a82 b113c0d 204629 4616 480 0 116.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161127_014446.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-26 01:44:45 0:43:52 6a57a82 b113c0d 204611 4616 480 0 119.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161126_014445.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4291 megabytes
Error: Processing ended: Thu Sep 29 19:38:25 2016
Error: Elapsed time: 00:51:18
Error: Total CPU time (on all processors): 00:51:17

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-25 01:44:27 0:43:28 6a57a82 b113c0d 2045F9 4616 480 0 118.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161125_014427.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-24 01:43:38 0:42:44 6a57a82 bb9d09b 2045E1 4616 480 0 119.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161124_014338.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20073 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb9d09b1fcac326152c629bf90bd01f6f007f221
Merge: bb3320f 40fb5c7
Author: FTK User
Date: Wed Nov 23 18:00:37 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 40fb5c78dc7da9fd78b9c675be6b0a9a3cef2ff1
Author: U-Chicago1\rzou
Date: Wed Nov 23 23:06:48 2016 +0100

A:q

A
A
A
B
:
B
B
tsort hold propagation
2016-11-23 01:44:44 0:43:49 6a57a82 bb3320f 2045C9 4616 480 0 117.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161123_014444.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-22 01:46:43 0:45:43 6a57a82 bb3320f 2045B1 4616 480 0 118.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161122_014643.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-21 01:45:41 0:44:45 6a57a82 bb3320f 204599 4616 480 0 116.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161121_014541.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-20 01:46:17 0:45:21 6a57a82 bb3320f 204581 4616 480 0 117.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161120_014617.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-19 01:44:29 0:43:31 6a57a82 bb3320f 204569 4616 480 0 118.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161119_014429.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-18 01:41:42 0:40:47 6a57a82 bb3320f 204551 4616 480 0 115.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161118_014142.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-17 01:46:08 0:45:13 6a57a82 bb3320f 204539 4616 480 0 121.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161117_014608.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-16 01:44:27 0:43:34 6a57a82 bb3320f 204521 4616 480 0 113.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161116_014427.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20082 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-15 01:41:34 0:40:41 6a57a82 bb3320f 204509 4616 480 0 119.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161115_014134.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-14 01:39:35 0:38:39 6a57a82 11f885e 2044F1 4616 480 0 121.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161114_013935.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20148 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-13 01:41:44 0:40:48 6a57a82 11f885e 2044D9 4616 480 0 122.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161113_014144.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-12 01:40:14 0:39:16 6a57a82 11f885e 2044C1 4616 480 0 124.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161112_014014.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20090 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-11 01:41:24 0:40:29 6a57a82 11f885e 2044A9 4616 480 0 119.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161111_014124.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-10 01:42:59 0:42:03 6a57a82 11f885e 204491 4616 480 0 117.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161110_014259.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-09 01:46:40 0:45:45 6a57a82 11f885e 204479 4616 480 0 118.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161109_014640.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 08:12:00 7:10:48 6a57a82 337b57e 203208 4617 480 0 115.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161108_081200.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-07 13:22:10 12:20:31 6a57a82 337b57e 203208 4617 480 0 118.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161107_132210.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-06 09:34:02 9:32:59 6a57a82 337b57e 203208 4617 480 0 121.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161106_093402.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-05 08:08:38 7:07:34 6a57a82 337b57e 203208 4617 480 0 119.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161105_080838.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-04 05:24:42 4:23:36 6a57a82 337b57e 203208 4617 480 0 118.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161104_052442.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-03 01:49:36 0:48:37 6a57a82 337b57e 2043E8 4616 480 0 120.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161103_014936.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-02 01:42:00 0:41:05 6a57a82 337b57e 2043D0 4616 480 0 121.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161102_014200.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-01 01:45:04 0:43:40 6a57a82 337b57e 2043B8 4616 480 0 116.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161101_014504.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20170 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-28 11:09:09 10:08:04 6a57a82 337b57e 203208 4617 480 0 122.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161028_110909.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at GxMonitor.vhd(171): formal port or parameter "cycle_time_short" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxRaw/Gx/GxMonitor.vhd Line: 171
Error (10784): HDL error at FIFOWordMonitor.vhd(19): see declaration for object "cycle_time_short" File: D:/Projects/ftk/Nightlies/AUXCommon/monitoring/FIFOWordMonitor.vhd Line: 19
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 4 warnings
Error: Peak virtual memory: 968 megabytes
Error: Processing ended: Mon Mar 13 01:01:02 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-27 06:49:29 5:48:34 6a57a82 337b57e 203208 4617 480 0 120.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161027_064929.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 02:51:50 1:50:55 6a57a82 337b57e 204328 4616 480 0 121.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161026_025150.tar.bz2 .


Firmware Git Logs

commit 6a57a82f19cb38db46902121070810fed62db66f
Author: unknown
Date: Mon Oct 24 17:15:10 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-21 01:42:50 0:41:57 e7d5ad4 dcf31e5 2042B0 4616 480 0 120.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161021_014250.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-20 01:44:22 0:43:28 e7d5ad4 dcf31e5 204298 4616 480 0 121.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161020_014422.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-19 01:42:45 0:41:51 e7d5ad4 dcf31e5 204280 4616 480 0 120.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161019_014245.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-18 01:40:40 0:39:48 e7d5ad4 dcf31e5 204268 4616 480 0 119.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161018_014040.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-17 01:40:08 0:39:16 e7d5ad4 dcf31e5 204250 4616 480 0 116.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161017_014008.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-16 01:40:18 0:39:24 e7d5ad4 dcf31e5 204238 4616 480 0 122.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161016_014018.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-15 01:44:15 0:43:21 e7d5ad4 dcf31e5 204220 4616 483 0 122.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161015_014415.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-14 01:44:23 0:43:25 e7d5ad4 dcf31e5 204208 4616 480 0 120.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161014_014423.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-13 01:45:02 0:44:09 e7d5ad4 810d361 2041F0 4616 480 0 123.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161013_014502.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-12 01:41:55 0:41:04 e7d5ad4 810d361 2041D8 4616 480 0 120.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161012_014155.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-11 04:40:34 3:39:17 e7d5ad4 810d361 203208 4617 480 0 124.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161011_044034.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Thu Oct 27 03:01:03 2016
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-10 01:44:05 0:43:09 e7d5ad4 810d361 2041A8 4616 480 0 122.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161010_014405.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20127 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-09 01:45:07 0:44:12 e7d5ad4 810d361 204190 4616 480 0 122.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161009_014507.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-08 01:45:24 0:44:26 e7d5ad4 810d361 204178 4616 480 0 117.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161008_014524.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-07 01:44:38 0:43:43 e7d5ad4 810d361 204160 4616 480 0 121.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161007_014438.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-06 01:43:28 0:42:34 e7d5ad4 810d361 204148 4616 480 0 120.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161006_014328.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sat Nov 05 18:00:49 2016
Error: Elapsed time: 00:00:29
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-05 01:43:04 0:42:11 e7d5ad4 810d361 204130 4616 480 0 122.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20161005_014304.tar.bz2 .


Firmware Git Logs

commit e7d5ad43033a56dc2da30df163fff6f0f435f19d
Author: unknown
Date: Tue Oct 4 14:16:48 2016 +0200

moving pll

commit 8f2d4bbb34d85600d5273044d0e9c06c42ddf8ab
Author: unknown
Date: Tue Oct 4 13:59:04 2016 +0200

move pll to RxLDC directory

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 01:49:20 0:48:21 96142e2 e61013c 2040A0 4608 480 0 122.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160929_014920.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19868 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit 96142e2c4032cdd7ce9149e6ec822c3763eb8a62
Author: unknown
Date: Mon Sep 19 14:23:33 2016 +0200

quartus 16 RxROS

commit 07d3b599bfd8e42f099adcdcd22f7245194a8d9a
Author: unknown
Date: Mon Sep 19 14:15:55 2016 +0200

quartus 16 RxLDC

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-16 01:35:48 0:34:39 dffacfd 4b63cf8 203C80 4618 475 0 122.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160816_013548.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-15 01:37:05 0:35:50 dffacfd 4b63cf8 203C68 4618 475 0 117.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160815_013705.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 01:37:27 0:36:18 dffacfd 4b63cf8 203C50 4618 475 0 119.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160814_013727.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 01:35:37 0:34:28 dffacfd 4b63cf8 203C38 4618 475 0 119.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160813_013537.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 01:38:50 0:37:40 dffacfd 4b63cf8 203C20 4618 475 0 116.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160812_013850.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 01:36:43 0:35:35 dffacfd 4b63cf8 203C08 4618 475 0 117.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160811_013643.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 01:37:46 0:36:39 dffacfd 4b63cf8 203BF0 4618 475 0 116.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160810_013746.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 01:41:38 0:40:23 dffacfd 4b63cf8 203BD8 4618 475 0 114.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160809_014138.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 01:42:01 0:40:10 dffacfd 4b63cf8 203BC0 4618 475 0 119.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160808_014201.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 01:37:08 0:35:58 dffacfd 4b63cf8 203BA8 4618 475 0 112.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160807_013708.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 01:52:21 0:51:06 dffacfd 4b63cf8 203B90 4618 475 0 118.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160806_015221.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20025 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 01:48:43 0:47:28 dffacfd 4b63cf8 203B78 4618 475 0 111.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160805_014843.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 03:33:15 2:31:37 dffacfd 4b63cf8 203208 4619 475 0 120.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160804_033315.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19996 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 01:40:16 0:39:04 dffacfd 4b63cf8 203B48 4618 475 0 114.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160803_014016.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 01:36:50 0:35:41 dffacfd 4b63cf8 203B30 4618 475 0 114.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160802_013650.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 01:36:54 0:35:45 dffacfd 4b63cf8 203B18 4618 475 0 111.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160801_013654.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20042 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 01:37:01 0:35:54 dffacfd 4b63cf8 203B00 4618 475 0 117.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160731_013701.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 01:37:05 0:35:54 dffacfd 4b63cf8 203AE8 4618 475 0 115.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160730_013705.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 19993 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 01:35:57 0:34:48 dffacfd 4b63cf8 203AD0 4618 475 0 114.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160729_013557.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Mar 05 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 01:36:32 0:35:22 dffacfd 4b63cf8 203AB8 4618 475 0 114.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160728_013632.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 01:44:28 0:43:20 dffacfd 4b63cf8 203AA0 4618 475 0 124.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160727_014428.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 01:35:48 0:34:41 dffacfd 4b63cf8 203A88 4618 475 0 117.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160726_013548.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 01:35:02 0:33:54 dffacfd 4b63cf8 203A70 4618 475 0 115.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160725_013502.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 01:35:39 0:34:34 dffacfd 4b63cf8 203A58 4618 475 0 117.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160724_013539.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 01:39:26 0:34:56 dffacfd 4b63cf8 203A40 4618 475 0 115.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160723_013926.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 01:36:06 0:34:57 dffacfd 4b63cf8 203A28 4618 475 0 121.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160722_013606.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 01:34:36 0:33:28 dffacfd 4b63cf8 203A10 4618 475 0 117.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160721_013436.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20087 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 01:37:04 0:35:44 dffacfd 4b63cf8 2039F8 4618 475 0 116.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160720_013704.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-19 01:34:14 0:33:04 dffacfd 4b63cf8 2039E0 4618 475 0 111.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160719_013414.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 01:35:52 0:34:44 dffacfd 4b63cf8 2039C8 4618 475 0 118.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160718_013552.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 01:36:24 0:35:17 dffacfd 4b63cf8 2039B0 4618 475 0 113.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160717_013624.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Fri Jan 13 04:01:14 2017
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 01:50:40 0:49:40 dffacfd 4b63cf8 203998 4618 475 0 117.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160716_015040.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 11:50:39 FAILED
2016-07-06 01:04:39 0:00:00 dffacfd 4b63cf8 N/A 20 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160706_010439.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus II 64-Bit Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 187 megabytes
Error: Processing ended: Wed Jul 06 09:04:37 2016
Error: Elapsed time: 00:00:00
Error: Total CPU time (on all processors): 00:00:00

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-01 01:39:09 0:38:00 dffacfd 4b63cf8 203830 4618 475 0 112.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160701_013909.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 01:58:10 0:56:31 dffacfd 4b63cf8 203818 4618 475 0 123.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160630_015810.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 20023 / 158500 0%
Total DSP Blocks 0 / 1092 0%
Horizontal periphery clocks and Vertical periphery clocks 39 / 248 0%

Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 08:09:34 7:07:35 dffacfd 4b63cf8 203208 4620 475 0 108.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160629_080934.tar.bz2 .


Firmware Git Logs

commit dffacfd6868e6de321b78dc298944e6a41f8b0da
Author: unknown
Date: Tue Jun 28 17:55:06 2016 +0200

adding PMA setting stuff to RxROS and RxLSC.

Adding freeze_to_DF to RxROS and RxLDC

commit 076fdf3b48cc59496bbb93951bd90fa5fea11b8d
Author: unknown
Date: Tue Jun 28 16:17:02 2016 +0200

Merge saxon's changes

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-28 01:36:06 0:35:00 cb64735 04f33a4 2037E8 4618 475 0 122.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Input2_RxRaw_20160628_013606.tar.bz2 .


Firmware Git Logs

commit cb647354ae8dd2b6a22f90f3f30a5043b6df39fc
Author: Jamie Saxon
Date: Fri May 6 16:07:10 2016 -0700

analog settings for Tx4_6Gbps_reco2

commit 21512243c90b123d5d0e8659440367ac4ce3b66a
Author: FTK User
Date: Mon Feb 22 12:36:30 2016 -0800

raw at 100 MHz

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Processor_200Mhz_Rx_EMIF

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-04-29 18:00:28 FAILED
2017-04-28 18:00:29 FAILED
2017-04-27 18:00:30 FAILED
2017-04-26 18:00:36 FAILED
2017-04-25 18:00:29 FAILED
2017-04-24 18:00:30 FAILED
2017-04-23 18:00:29 FAILED
2017-04-22 18:00:29 FAILED
2017-04-21 18:00:44 FAILED
2017-04-20 18:00:35 FAILED
2017-04-19 18:00:29 FAILED
2017-04-18 18:00:28 FAILED
2017-04-17 18:00:28 FAILED
2017-04-12 18:01:12 0:00:42 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170412_180112.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Apr 12 18:01:12 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 18:01:26 0:00:57 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170411_180126.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Apr 11 18:01:26 2017
Error: Elapsed time: 00:00:52
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 18:01:22 0:00:52 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170410_180122.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Apr 10 18:01:22 2017
Error: Elapsed time: 00:00:49
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 18:01:25 0:00:55 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170409_180125.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Apr 09 18:01:24 2017
Error: Elapsed time: 00:00:51
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 18:01:12 0:00:43 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170408_180112.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Apr 08 18:01:11 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 18:01:42 0:00:59 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170407_180142.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Apr 07 18:01:42 2017
Error: Elapsed time: 00:00:53
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 18:01:19 0:00:50 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170406_180119.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Apr 06 18:01:19 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 18:01:20 0:00:50 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170405_180120.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Apr 05 18:01:19 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 18:01:21 0:00:51 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170404_180121.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Apr 04 18:01:21 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-03 18:01:22 0:00:50 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170403_180122.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Apr 03 18:01:21 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-02 18:01:03 0:00:43 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170402_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Apr 02 18:01:02 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-01 18:01:05 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170401_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Apr 01 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-31 18:01:03 0:00:42 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170331_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Fri Mar 31 18:01:02 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-30 18:01:03 0:00:40 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170330_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Mar 30 18:01:03 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-29 18:01:01 0:00:42 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170329_180101.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Mar 29 18:01:01 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-28 18:01:19 0:00:46 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170328_180119.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Mar 28 18:01:18 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-27 18:01:02 0:00:43 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170327_180102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Mon Mar 27 18:01:02 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-26 18:01:05 0:00:43 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170326_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Mar 26 18:01:04 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-25 18:01:03 0:00:42 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170325_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Mar 25 18:01:02 2017
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-24 18:01:04 0:00:42 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170324_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Fri Mar 24 18:01:04 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-23 18:01:07 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170323_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Thu Mar 23 18:01:06 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 18:01:04 0:00:43 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170322_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Wed Mar 22 18:01:04 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 18:01:56 0:01:32 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170321_180156.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Tue Mar 21 18:01:56 2017
Error: Elapsed time: 00:01:27
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 18:01:04 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170320_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Mar 20 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 18:01:05 0:00:45 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170319_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Mar 19 18:01:05 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 18:01:04 0:00:46 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170318_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Mar 18 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-17 18:01:36 0:00:59 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170317_180136.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Mar 17 18:01:36 2017
Error: Elapsed time: 00:00:48
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-16 18:00:52 0:00:35 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170316_180052.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Mar 16 18:00:52 2017
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 18:01:05 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170315_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Mar 15 18:01:04 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 18:01:02 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170314_180102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Mar 14 18:01:02 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 18:01:07 0:00:45 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170313_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Mar 13 18:01:07 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 18:01:04 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170312_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sun Mar 12 18:01:03 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 18:01:04 0:00:44 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170311_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sat Mar 11 18:01:04 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 18:01:07 0:00:46 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170310_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Fri Mar 10 18:01:07 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 18:01:05 0:00:46 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170309_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Thu Mar 09 18:01:05 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 18:01:04 0:00:43 3abbcac 9ea10b2 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170308_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Wed Mar 08 18:01:03 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-07 18:01:08 0:00:46 3abbcac 1162096 N/A 1865 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170307_180108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Tue Mar 07 18:01:07 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit a4bb9ac01e7ccbab780c77f910372320a9373484
Author: Karol Krizka
Date: Tue Mar 7 15:11:10 2017 -0800

Add setclock.tcl to figure out the main clock frequency by searching for the pll_main file.
2017-03-06 18:01:04 0:00:44 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170306_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Mar 06 18:01:03 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-05 18:01:06 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170305_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Mar 05 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-04 18:01:05 0:00:45 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170304_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Mar 04 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-03 18:01:28 0:00:56 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170303_180128.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Mar 03 18:01:27 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-02 18:01:05 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170302_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Mar 02 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-01 18:01:07 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170301_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Mar 01 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-28 18:01:05 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170228_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Feb 28 18:01:04 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-27 18:01:06 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170227_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Feb 27 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-26 18:01:04 0:00:43 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170226_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Feb 26 18:01:03 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-25 18:01:06 0:00:47 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170225_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Feb 25 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-24 18:01:07 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170224_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Feb 24 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-23 18:01:07 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170223_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Feb 23 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-22 18:01:05 0:00:45 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170222_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 22 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-21 18:01:05 0:00:45 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170221_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Feb 21 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-20 18:01:06 0:00:45 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170220_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Feb 20 18:01:05 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-19 18:01:05 0:00:45 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170219_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Feb 19 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 18:01:05 0:00:46 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170218_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Feb 18 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 18:01:56 0:00:57 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170217_180156.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Feb 17 18:01:56 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-16 18:01:08 0:00:45 3abbcac 9627342 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170216_180108.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Feb 16 18:01:08 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-15 18:01:06 0:00:48 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170215_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 15 18:01:06 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-14 18:01:06 0:00:48 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170214_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Feb 14 18:01:06 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-13 18:01:05 0:00:46 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170213_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Feb 13 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-12 18:01:05 0:00:46 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170212_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Feb 12 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-11 18:01:04 0:00:45 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170211_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Feb 11 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-10 18:01:07 0:00:47 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170210_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Feb 10 18:01:06 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-09 18:01:03 0:00:43 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170209_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Feb 09 18:01:02 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-08 18:01:05 0:00:46 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170208_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 08 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-07 18:04:23 0:00:46 3abbcac ab48262 N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170207_180423.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Tue Feb 07 18:04:23 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-06 18:01:33 0:00:51 3abbcac 6d928dd N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170206_180133.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Mon Feb 06 18:01:33 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-02-05 18:01:23 0:00:51 3abbcac 733048d N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170205_180123.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sun Feb 05 18:01:23 2017
Error: Elapsed time: 00:00:45
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-04 18:01:07 0:00:48 3abbcac 733048d N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170204_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Sat Feb 04 18:01:06 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-03 18:01:37 0:00:59 3abbcac 733048d N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170203_180137.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Fri Feb 03 18:01:36 2017
Error: Elapsed time: 00:00:48
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-02 18:01:05 0:00:44 3abbcac 733048d N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170202_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Thu Feb 02 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-01 18:01:04 0:00:44 3abbcac 733048d N/A 1864 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170201_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 01 18:01:03 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-01-31 18:01:06 0:00:45 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170131_180106.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Tue Jan 31 18:01:06 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-30 18:01:04 0:00:45 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170130_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Mon Jan 30 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-29 18:01:05 0:00:44 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170129_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sun Jan 29 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-28 18:01:05 0:00:45 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170128_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sat Jan 28 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 18:01:07 0:00:47 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170127_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Fri Jan 27 18:01:06 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-26 18:01:42 0:00:59 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170126_180142.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Thu Jan 26 18:01:42 2017
Error: Elapsed time: 00:00:48
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-25 18:01:15 0:00:48 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170125_180115.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Wed Jan 25 18:01:14 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-24 18:01:04 0:00:45 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170124_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Tue Jan 24 18:01:04 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 18:01:34 0:00:52 3abbcac 1abcab8 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170123_180134.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Mon Jan 23 18:01:33 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-22 18:01:04 0:00:44 3abbcac 6aed696 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170122_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sun Jan 22 18:01:03 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-21 18:01:03 0:00:45 3abbcac 6aed696 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170121_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sat Jan 21 18:01:03 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-20 18:01:23 0:00:53 3abbcac 6aed696 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170120_180123.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Fri Jan 20 18:01:22 2017
Error: Elapsed time: 00:00:45
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-19 18:01:07 0:00:47 3abbcac 6aed696 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170119_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Thu Jan 19 18:01:07 2017
Error: Elapsed time: 00:00:43
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-18 18:01:03 0:00:44 3abbcac 6aed696 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170118_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Wed Jan 18 18:01:03 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-17 18:01:23 0:00:52 3abbcac 04ac7d4 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170117_180123.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Tue Jan 17 18:01:23 2017
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-16 18:01:05 0:00:46 3abbcac 04ac7d4 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170116_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Mon Jan 16 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 04ac7d4120b0f27bed477c8065d9a3b6942cb546
Merge: f812395 964d481
Author: FTK User
Date: Mon Jan 16 12:01:51 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 964d481c44de3f4393c35085bb50988dd236f399
Author: unknown
Date: Mon Jan 16 17:14:36 2017 +0100

adding fifo overflow flags specifically for freeze
2017-01-15 18:01:03 0:00:43 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170115_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Jan 15 18:01:02 2017
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-14 18:01:04 0:00:45 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170114_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Jan 14 18:01:04 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-13 18:01:33 0:00:55 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170113_180133.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Fri Jan 13 18:01:33 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-12 18:01:05 0:00:45 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170112_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Thu Jan 12 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-11 18:01:24 0:00:53 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170111_180124.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Wed Jan 11 18:01:24 2017
Error: Elapsed time: 00:00:47
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-10 18:01:29 0:00:59 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170110_180129.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Tue Jan 10 18:01:28 2017
Error: Elapsed time: 00:00:51
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-09 18:01:18 0:00:45 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170109_180118.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Mon Jan 09 18:01:17 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-08 18:01:03 0:00:44 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170108_180103.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Jan 08 18:01:03 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-07 18:01:04 0:00:44 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170107_180104.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Jan 07 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 18:01:05 0:00:45 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170106_180105.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Fri Jan 06 18:01:04 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-05 18:01:54 0:01:30 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170105_180154.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Thu Jan 05 18:01:54 2017
Error: Elapsed time: 00:01:26
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-04 18:00:58 0:00:39 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170104_180058.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Wed Jan 04 18:00:58 2017
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-03 18:01:17 0:00:46 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170103_180117.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Tue Jan 03 18:01:16 2017
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-02 18:01:00 0:00:41 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170102_180100.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Mon Jan 02 18:00:59 2017
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-01 18:00:58 0:00:38 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20170101_180058.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Jan 01 18:00:57 2017
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 18:00:48 0:00:31 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161231_180048.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Sat Dec 31 18:00:48 2016
Error: Elapsed time: 00:00:28
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-30 18:00:53 0:00:36 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161230_180053.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Fri Dec 30 18:00:53 2016
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-29 18:00:53 0:00:36 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161229_180053.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Thu Dec 29 18:00:53 2016
Error: Elapsed time: 00:00:33
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-28 18:01:01 0:00:41 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161228_180101.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Wed Dec 28 18:01:00 2016
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 18:00:57 0:00:39 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161227_180057.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Tue Dec 27 18:00:57 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-26 18:00:52 0:00:34 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161226_180052.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Mon Dec 26 18:00:52 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-25 18:01:00 0:00:41 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161225_180100.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 986 megabytes
Error: Processing ended: Sun Dec 25 18:00:59 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-24 18:00:57 0:00:38 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161224_180057.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Dec 24 18:00:57 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-23 18:01:33 0:00:50 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161223_180133.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Fri Dec 23 18:01:32 2016
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 18:00:59 0:00:40 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161222_180059.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Thu Dec 22 18:00:59 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-21 18:00:53 0:00:35 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161221_180053.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 979 megabytes
Error: Processing ended: Wed Dec 21 18:00:53 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-20 18:00:57 0:00:35 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161220_180057.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Tue Dec 20 18:00:57 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-19 18:01:02 0:00:43 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161219_180102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Mon Dec 19 18:01:02 2016
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-18 18:00:56 0:00:37 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161218_180056.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Dec 18 18:00:55 2016
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-17 18:01:00 0:00:41 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161217_180100.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sat Dec 17 18:00:59 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-16 18:01:54 0:01:23 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161216_180154.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Fri Dec 16 18:01:54 2016
Error: Elapsed time: 00:01:17
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-15 18:00:54 0:00:37 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161215_180054.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Thu Dec 15 18:00:53 2016
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-14 18:00:50 0:00:33 3abbcac f812395 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161214_180050.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Wed Dec 14 18:00:50 2016
Error: Elapsed time: 00:00:30
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-13 18:00:50 0:00:32 3abbcac e90ac0c N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161213_180050.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Tue Dec 13 18:00:49 2016
Error: Elapsed time: 00:00:29
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-12 18:01:13 0:00:40 3abbcac e90ac0c N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161212_180113.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Mon Dec 12 18:01:12 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-11 18:00:49 0:00:34 3abbcac e90ac0c N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161211_180049.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sun Dec 11 18:00:49 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-10 18:01:02 0:00:44 3abbcac e90ac0c N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161210_180102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Sat Dec 10 18:01:01 2016
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-09 18:01:02 0:00:44 3abbcac e90ac0c N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161209_180102.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Fri Dec 09 18:01:02 2016
Error: Elapsed time: 00:00:40
Error: Total CPU time (on all processors): 00:00:17

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-08 18:01:07 0:00:37 3abbcac fa16ef3 N/A 1859 10 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161208_180107.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Thu Dec 08 18:01:06 2016
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit fa16ef360dba35f2b735acfd645c62c9daabe657
Merge: b113c0d b6482ae
Author: FTK User
Date: Thu Dec 8 12:00:59 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit b6482ae100a7e48adf09d638c2b4f762787c2631
Merge: fe5cf0a 174ec1d
Author: unknown
Date: Thu Dec 8 15:25:52 2016 +0100

Merge remote-tracking branch 'origin/master'

Conflicts:
ssmap/tcl/tb_SSMapPixelLayer.do
2016-12-07 18:00:53 0:00:37 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161207_180053.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Dec 07 18:00:53 2016
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-06 18:00:49 0:00:33 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161206_180049.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Dec 06 18:00:49 2016
Error: Elapsed time: 00:00:30
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-05 18:00:49 0:00:33 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161205_180049.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Mon Dec 05 18:00:49 2016
Error: Elapsed time: 00:00:30
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-04 18:00:58 0:00:40 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161204_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sun Dec 04 18:00:58 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 18:00:50 0:00:32 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161203_180050.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sat Dec 03 18:00:50 2016
Error: Elapsed time: 00:00:30
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-02 18:01:16 0:00:44 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161202_180116.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Fri Dec 02 18:01:16 2016
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 18:00:54 0:00:38 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161201_180054.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Thu Dec 01 18:00:54 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-30 18:00:53 0:00:36 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161130_180053.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Nov 30 18:00:53 2016
Error: Elapsed time: 00:00:34
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-29 18:00:52 0:00:34 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161129_180052.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Nov 29 18:00:52 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-28 18:00:58 0:00:40 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161128_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Mon Nov 28 18:00:58 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-27 18:01:00 0:00:42 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161127_180100.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sun Nov 27 18:01:00 2016
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-26 18:00:55 0:00:38 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161126_180055.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sat Nov 26 18:00:55 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-25 18:00:57 0:00:38 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161125_180057.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Fri Nov 25 18:00:56 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-24 18:00:56 0:00:38 3abbcac b113c0d N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161124_180056.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Thu Nov 24 18:00:56 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-23 18:01:35 0:00:54 3abbcac bb9d09b N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161123_180135.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Nov 23 18:01:34 2016
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb9d09b1fcac326152c629bf90bd01f6f007f221
Merge: bb3320f 40fb5c7
Author: FTK User
Date: Wed Nov 23 18:00:37 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 40fb5c78dc7da9fd78b9c675be6b0a9a3cef2ff1
Author: U-Chicago1\rzou
Date: Wed Nov 23 23:06:48 2016 +0100

A:q

A
A
A
B
:
B
B
tsort hold propagation
2016-11-22 18:01:01 0:00:41 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161122_180101.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Nov 22 18:01:01 2016
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-21 18:00:58 0:00:41 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161121_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Mon Nov 21 18:00:58 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-20 18:00:58 0:00:40 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161120_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sun Nov 20 18:00:58 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-19 18:00:58 0:00:40 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161119_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sat Nov 19 18:00:58 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-18 18:01:25 0:00:50 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161118_180125.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Fri Nov 18 18:01:24 2016
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-17 18:01:00 0:00:41 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161117_180100.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Thu Nov 17 18:01:00 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-16 18:00:59 0:00:42 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161116_180059.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Wed Nov 16 18:00:59 2016
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-15 18:00:57 0:00:39 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161115_180057.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Tue Nov 15 18:00:57 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-14 18:00:59 0:00:41 3abbcac bb3320f N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161114_180059.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Mon Nov 14 18:00:59 2016
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-13 18:00:58 0:00:40 3abbcac 11f885e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161113_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sun Nov 13 18:00:57 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-12 18:00:58 0:00:40 3abbcac 11f885e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161112_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sat Nov 12 18:00:58 2016
Error: Elapsed time: 00:00:37
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-11 18:01:59 0:01:27 3abbcac 11f885e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161111_180159.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 976 megabytes
Error: Processing ended: Fri Nov 11 18:01:58 2016
Error: Elapsed time: 00:01:20
Error: Total CPU time (on all processors): 00:00:15

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-10 18:00:56 0:00:38 3abbcac 11f885e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161110_180056.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Thu Nov 10 18:00:56 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-09 18:00:59 0:00:39 3abbcac 11f885e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161109_180059.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Wed Nov 09 18:00:58 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 18:00:49 0:00:32 3abbcac 11f885e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161108_180049.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Tue Nov 08 18:00:49 2016
Error: Elapsed time: 00:00:29
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-07 18:00:50 0:00:32 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161107_180050.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Mon Nov 07 18:00:50 2016
Error: Elapsed time: 00:00:29
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-06 18:00:56 0:00:36 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161106_180056.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sun Nov 06 18:00:55 2016
Error: Elapsed time: 00:00:33
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-05 18:00:50 0:00:32 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161105_180050.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sat Nov 05 18:00:49 2016
Error: Elapsed time: 00:00:29
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-04 18:00:51 0:00:33 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161104_180051.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Fri Nov 04 18:00:51 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-03 18:00:48 0:00:30 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161103_180048.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Thu Nov 03 18:00:47 2016
Error: Elapsed time: 00:00:28
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-02 18:00:57 0:00:38 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161102_180057.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Wed Nov 02 18:00:56 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-01 18:00:58 0:00:39 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161101_180058.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Tue Nov 01 18:00:57 2016
Error: Elapsed time: 00:00:36
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-31 18:03:21 0:01:35 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161031_180321.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 976 megabytes
Error: Processing ended: Mon Oct 31 18:03:21 2016
Error: Elapsed time: 00:01:22
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-28 18:01:43 0:00:56 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161028_180143.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Fri Oct 28 18:01:43 2016
Error: Elapsed time: 00:00:49
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-27 18:00:53 0:00:35 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161027_180053.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Thu Oct 27 18:00:53 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 18:00:53 0:00:35 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161026_180053.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Oct 26 18:00:52 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-25 18:00:54 0:00:35 3abbcac 337b57e N/A 1859 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161025_180054.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Tue Oct 25 18:00:53 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-24 19:43:23 1:42:53 3abbcac c92deb1 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161024_194323.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4291 megabytes
Error: Processing ended: Mon Oct 24 19:43:22 2016
Error: Elapsed time: 00:54:20
Error: Total CPU time (on all processors): 00:54:17

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit c92deb1a6ca50f978487919c40415efc261ffebc
Merge: dcf31e5 800b606
Author: FTK User
Date: Mon Oct 24 12:01:36 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 800b606fe85acaa6c85e8ac01f3e5a59484f8753
Author: unknown
Date: Mon Oct 24 17:14:05 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR
2016-10-23 19:35:11 1:34:40 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161023_193511.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4293 megabytes
Error: Processing ended: Sun Oct 23 19:35:10 2016
Error: Elapsed time: 00:48:55
Error: Total CPU time (on all processors): 00:48:55

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-22 19:35:06 1:34:35 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161022_193506.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4285 megabytes
Error: Processing ended: Sat Oct 22 19:35:05 2016
Error: Elapsed time: 00:48:20
Error: Total CPU time (on all processors): 00:48:19

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-21 19:37:11 1:36:18 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161021_193711.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4301 megabytes
Error: Processing ended: Fri Oct 21 19:37:09 2016
Error: Elapsed time: 00:48:31
Error: Total CPU time (on all processors): 00:48:31

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-20 19:34:19 1:33:49 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161020_193419.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4290 megabytes
Error: Processing ended: Thu Oct 20 19:34:18 2016
Error: Elapsed time: 00:48:16
Error: Total CPU time (on all processors): 00:48:14

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-19 19:35:21 1:34:51 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161019_193521.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4290 megabytes
Error: Processing ended: Wed Oct 19 19:35:19 2016
Error: Elapsed time: 00:48:06
Error: Total CPU time (on all processors): 00:48:06

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-18 19:35:06 1:34:35 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161018_193506.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4291 megabytes
Error: Processing ended: Tue Oct 18 19:35:04 2016
Error: Elapsed time: 00:48:55
Error: Total CPU time (on all processors): 00:48:54

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-17 19:39:35 1:39:02 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161017_193935.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4289 megabytes
Error: Processing ended: Mon Oct 17 19:39:34 2016
Error: Elapsed time: 00:49:07
Error: Total CPU time (on all processors): 00:49:05

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-16 19:29:24 1:28:55 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161016_192924.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4291 megabytes
Error: Processing ended: Sun Oct 16 19:29:23 2016
Error: Elapsed time: 00:46:33
Error: Total CPU time (on all processors): 00:46:32

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-15 19:32:17 1:31:46 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161015_193217.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4284 megabytes
Error: Processing ended: Sat Oct 15 19:32:16 2016
Error: Elapsed time: 00:47:51
Error: Total CPU time (on all processors): 00:47:49

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-14 19:41:15 1:40:26 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161014_194115.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4295 megabytes
Error: Processing ended: Fri Oct 14 19:41:13 2016
Error: Elapsed time: 00:50:48
Error: Total CPU time (on all processors): 00:50:48

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-13 19:41:24 1:40:46 3abbcac dcf31e5 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161013_194124.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4291 megabytes
Error: Processing ended: Thu Oct 13 19:41:22 2016
Error: Elapsed time: 00:51:13
Error: Total CPU time (on all processors): 00:51:12

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-12 19:47:08 1:46:24 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161012_194708.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4290 megabytes
Error: Processing ended: Wed Oct 12 19:47:07 2016
Error: Elapsed time: 00:50:51
Error: Total CPU time (on all processors): 00:50:27

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-11 19:32:18 1:31:39 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161011_193218.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4288 megabytes
Error: Processing ended: Tue Oct 11 19:32:17 2016
Error: Elapsed time: 00:46:23
Error: Total CPU time (on all processors): 00:44:58

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-10 19:31:36 1:31:06 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161010_193136.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4295 megabytes
Error: Processing ended: Mon Oct 10 19:31:35 2016
Error: Elapsed time: 00:46:36
Error: Total CPU time (on all processors): 00:45:34

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-09 19:41:18 1:40:38 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161009_194118.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4298 megabytes
Error: Processing ended: Sun Oct 09 19:41:17 2016
Error: Elapsed time: 00:50:02
Error: Total CPU time (on all processors): 00:50:01

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-08 19:38:17 1:37:46 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161008_193817.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4295 megabytes
Error: Processing ended: Sat Oct 08 19:38:16 2016
Error: Elapsed time: 00:50:08
Error: Total CPU time (on all processors): 00:50:07

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-07 19:40:50 1:40:18 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161007_194050.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4295 megabytes
Error: Processing ended: Fri Oct 07 19:40:49 2016
Error: Elapsed time: 00:51:01
Error: Total CPU time (on all processors): 00:51:00

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-06 19:40:36 1:40:07 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161006_194036.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4296 megabytes
Error: Processing ended: Thu Oct 06 19:40:35 2016
Error: Elapsed time: 00:51:37
Error: Total CPU time (on all processors): 00:51:36

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-05 19:38:02 1:37:30 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161005_193802.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4281 megabytes
Error: Processing ended: Wed Oct 05 19:38:01 2016
Error: Elapsed time: 00:50:11
Error: Total CPU time (on all processors): 00:50:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-04 19:36:51 1:36:22 3abbcac 810d361 N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161004_193651.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4300 megabytes
Error: Processing ended: Tue Oct 04 19:36:50 2016
Error: Elapsed time: 00:49:11
Error: Total CPU time (on all processors): 00:49:10

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-03 18:00:53 0:00:03 3abbcac 7b8defc N/A 47 1 1 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161003_180053.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-02 18:00:51 0:00:03 3abbcac 7b8defc N/A 47 1 1 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161002_180051.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-01 18:00:51 0:00:02 3abbcac 7b8defc N/A 47 1 1 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20161001_180051.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-30 19:45:38 1:44:55 3abbcac 7b8defc N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160930_194538.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4298 megabytes
Error: Processing ended: Fri Sep 30 19:45:37 2016
Error: Elapsed time: 00:54:44
Error: Total CPU time (on all processors): 00:54:05

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 19:38:27 1:37:56 3abbcac 7b8defc N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160929_193827.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4291 megabytes
Error: Processing ended: Thu Sep 29 19:38:25 2016
Error: Elapsed time: 00:51:18
Error: Total CPU time (on all processors): 00:51:17

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 16:34:08 1:38:01 3abbcac 7b8defc N/A 14181 627 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160929_163408.tar.bz2 .

Fitter Errors

Error (14996): The Fitter failed to find a legal placement for all periphery components
Error (14986): After placing as many components as possible, the following errors remain:
Error (13081): The Fitter cannot route to 1 clock core fanout
Error (16234): No legal location could be found out of 5 considered location(s). Reasons why each location could not be used are summarized below:
Error (11578): Cannot place due to overuse of RAM resources
Error (14903): The following regions are not compatible given the current clock driver placement (5 locations affected)
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 7 errors, 10 warnings
Error: Peak virtual memory: 4286 megabytes
Error: Processing ended: Thu Sep 29 16:34:06 2016
Error: Elapsed time: 00:51:42
Error: Total CPU time (on all processors): 00:51:13

Firmware Git Logs

commit 3abbcacdbe85e121b7962fc8e4e94faaef11b886
Author: FTK User
Date: Thu Sep 29 14:54:44 2016 -0700

Frequency set to 200 MHz.

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 07:33:25 13:30:56 06c7484 e61013c N/A 15020 691 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160929_073325.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 79 warnings
Error: Peak virtual memory: 14984 megabytes
Error: Processing ended: Thu Sep 29 07:32:10 2016
Error: Elapsed time: 11:04:21
Error: Total CPU time (on all processors): 17:36:26

Firmware Git Logs

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

commit 17b76abbeec82de868e784ee862f45f159daf395
Author: unknown
Date: Wed Sep 28 13:03:02 2016 +0200

Fix backpressure issue from TF when road spamming. Reduce FIFO sizes to try and free up some space. Adding Road error protection and FREEZEs

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-15 23:22:13 5:20:49 aa43a53 4b63cf8 F23C79 108836 738 0 136.8/100.0 156.5/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160815_232213.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 125800 / 190240 0%
Total DSP Blocks 1709 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 23:30:47 5:29:25 aa43a53 4b63cf8 F23C61 108836 738 0 122.2/100.0 147.7/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160814_233047.tar.bz2 .


Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 23:17:51 5:16:26 aa43a53 4b63cf8 F23C49 108833 738 0 134.2/100.0 158.3/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160813_231751.tar.bz2 .


Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 23:40:38 5:39:50 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160812_234038.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13833 megabytes
Error: Processing ended: Sat Aug 13 07:40:32 2016
Error: Elapsed time: 04:50:45
Error: Total CPU time (on all processors): 08:30:22

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 23:49:55 5:48:18 aa43a53 4b63cf8 F23C19 108836 738 0 127.8/100.0 155.5/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160811_234955.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 125760 / 190240 0%
Total DSP Blocks 1709 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 23:58:35 5:57:49 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160810_235835.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13910 megabytes
Error: Processing ended: Thu Aug 11 07:58:30 2016
Error: Elapsed time: 05:08:21
Error: Total CPU time (on all processors): 08:45:24

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 00:06:12 6:04:41 aa43a53 4b63cf8 F23BE9 108836 738 0 126.8/100.0 157.9/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160810_000612.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 125729 / 190240 0%
Total DSP Blocks 1709 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 00:13:05 6:12:12 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160809_001305.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13837 megabytes
Error: Processing ended: Tue Aug 09 08:12:59 2016
Error: Elapsed time: 05:18:02
Error: Total CPU time (on all processors): 09:06:03

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 01:45:38 7:43:57 aa43a53 4b63cf8 F23BB9 108842 738 0 125.7/100.0 141.7/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160808_014538.tar.bz2 .


Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 23:59:39 5:58:47 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160806_235939.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13834 megabytes
Error: Processing ended: Sun Aug 07 07:59:33 2016
Error: Elapsed time: 05:10:50
Error: Total CPU time (on all processors): 09:09:13

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 14:55:55 3:30:00 aa43a53 4b63cf8 F23B59 109026 738 0 113.5/100.0 35.8/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160806_145555.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 981 megabytes
Error: Processing ended: Sun Jan 08 18:01:03 2017
Error: Elapsed time: 00:00:41
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 00:18:29 6:17:34 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160803_001829.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13801 megabytes
Error: Processing ended: Wed Aug 03 08:18:22 2016
Error: Elapsed time: 05:22:10
Error: Total CPU time (on all processors): 09:05:23

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 23:47:19 5:46:27 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160801_234719.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13814 megabytes
Error: Processing ended: Tue Aug 02 07:47:12 2016
Error: Elapsed time: 04:57:27
Error: Total CPU time (on all processors): 08:43:55

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 23:04:19 5:02:49 aa43a53 4b63cf8 F23B11 108833 738 0 130.9/100.0 156.0/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160731_230419.tar.bz2 .


Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 01:02:52 7:02:04 aa43a53 4b63cf8 N/A 14154 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160731_010252.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13872 megabytes
Error: Processing ended: Sun Jul 31 09:02:47 2016
Error: Elapsed time: 06:15:49
Error: Total CPU time (on all processors): 14:36:06

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 23:48:37 5:47:49 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160729_234837.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13834 megabytes
Error: Processing ended: Sat Jul 30 07:48:31 2016
Error: Elapsed time: 05:01:19
Error: Total CPU time (on all processors): 08:45:23

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 23:43:33 5:42:40 aa43a53 4b63cf8 N/A 14146 677 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160728_234333.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13984 megabytes
Error: Processing ended: Fri Jul 29 07:43:27 2016
Error: Elapsed time: 04:56:33
Error: Total CPU time (on all processors): 08:39:56

Firmware Git Logs

commit aa43a53c4873323b00a77c12a1244e6d6506cbdd
Merge: c6b537c f873fc1
Author: FTK User
Date: Thu Jul 28 18:00:16 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 23:15:07 5:13:32 c6b537c 4b63cf8 F23AB1 108735 744 0 132.8/100.0 155.5/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160727_231507.tar.bz2 .


Firmware Git Logs

commit c6b537c7cd0ffd65124e1fb2d03b32ad57a34992
Merge: 4b7c2bd 80e6e88
Author: FTK User
Date: Fri Jul 22 18:00:19 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 02:04:46 8:03:14 c6b537c 4b63cf8 F23A99 108756 750 0 128.6/100.0 137.5/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160727_020446.tar.bz2 .


Firmware Git Logs

commit c6b537c7cd0ffd65124e1fb2d03b32ad57a34992
Merge: 4b7c2bd 80e6e88
Author: FTK User
Date: Fri Jul 22 18:00:19 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 23:14:37 5:13:05 c6b537c 4b63cf8 F23A81 108735 744 0 130.1/100.0 160.8/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160725_231437.tar.bz2 .


Firmware Git Logs

commit c6b537c7cd0ffd65124e1fb2d03b32ad57a34992
Merge: 4b7c2bd 80e6e88
Author: FTK User
Date: Fri Jul 22 18:00:19 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 23:14:54 5:13:21 c6b537c 4b63cf8 F23A69 108738 744 0 128.4/100.0 161.8/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160724_231454.tar.bz2 .


Firmware Git Logs

commit c6b537c7cd0ffd65124e1fb2d03b32ad57a34992
Merge: 4b7c2bd 80e6e88
Author: FTK User
Date: Fri Jul 22 18:00:19 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 23:41:46 5:40:15 c6b537c 4b63cf8 F23A51 108738 744 0 126.8/100.0 150.4/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160723_234146.tar.bz2 .


Firmware Git Logs

commit c6b537c7cd0ffd65124e1fb2d03b32ad57a34992
Merge: 4b7c2bd 80e6e88
Author: FTK User
Date: Fri Jul 22 18:00:19 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 23:08:19 5:06:43 c6b537c 4b63cf8 F23A39 108735 744 0 130.1/100.0 141.5/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160722_230819.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 125932 / 190240 0%
Total DSP Blocks 1703 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit c6b537c7cd0ffd65124e1fb2d03b32ad57a34992
Merge: 4b7c2bd 80e6e88
Author: FTK User
Date: Fri Jul 22 18:00:19 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 00:31:07 6:30:16 4b7c2bd 4b63cf8 N/A 14113 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160722_003107.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13806 megabytes
Error: Processing ended: Fri Jul 22 08:31:01 2016
Error: Elapsed time: 05:44:15
Error: Total CPU time (on all processors): 13:20:56

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 00:48:58 6:47:37 4b7c2bd 4b63cf8 F23A09 108799 744 0 132.4/100.0 137.1/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160721_004858.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 12:07:55 18:06:24 4b7c2bd 4b63cf8 F239F1 108796 744 0 131.8/100.0 157.1/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160720_120755.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 125942 / 190240 0%
Total DSP Blocks 1703 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 23:35:25 5:34:42 4b7c2bd 4b63cf8 N/A 14105 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160718_233525.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13876 megabytes
Error: Processing ended: Tue Jul 19 07:35:19 2016
Error: Elapsed time: 04:49:15
Error: Total CPU time (on all processors): 08:29:07

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 23:16:12 5:15:26 4b7c2bd 4b63cf8 N/A 14105 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160717_231612.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13959 megabytes
Error: Processing ended: Mon Jul 18 07:16:06 2016
Error: Elapsed time: 04:30:51
Error: Total CPU time (on all processors): 07:59:07

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 23:19:38 5:18:13 4b7c2bd 4b63cf8 F239A9 108795 744 0 132.0/100.0 155.8/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160716_231938.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 125536 / 190240 0%
Total DSP Blocks 1703 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 09:57:19 15:55:51 4b7c2bd 4b63cf8 F23991 108825 744 0 101.2/100.0 95.9/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160716_095719.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 01:41:18 7:40:23 4b7c2bd 4b63cf8 N/A 14106 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160715_014118.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13858 megabytes
Error: Processing ended: Fri Jul 15 09:41:10 2016
Error: Elapsed time: 06:31:51
Error: Total CPU time (on all processors): 10:20:06

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 02:59:20 8:58:25 4b7c2bd 4b63cf8 N/A 14114 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160714_025920.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13950 megabytes
Error: Processing ended: Thu Jul 14 10:59:12 2016
Error: Elapsed time: 07:50:26
Error: Total CPU time (on all processors): 16:03:28

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 03:58:14 9:57:18 4b7c2bd 4b63cf8 N/A 14115 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160713_035814.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13865 megabytes
Error: Processing ended: Wed Jul 13 11:58:05 2016
Error: Elapsed time: 08:45:55
Error: Total CPU time (on all processors): 19:58:42

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 01:52:30 7:51:36 4b7c2bd 4b63cf8 N/A 14106 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160712_015230.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13888 megabytes
Error: Processing ended: Tue Jul 12 09:52:22 2016
Error: Elapsed time: 06:44:20
Error: Total CPU time (on all processors): 11:40:25

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 01:04:25 7:02:32 4b7c2bd 4b63cf8 F23919 108796 744 0 127.2/100.0 151.3/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160711_010425.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 01:08:46 7:06:54 4b7c2bd 4b63cf8 F23901 108796 744 0 131.4/100.0 152.6/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160710_010846.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 01:39:27 7:38:31 4b7c2bd 4b63cf8 N/A 14106 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160709_013927.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13851 megabytes
Error: Processing ended: Sat Jul 09 09:39:19 2016
Error: Elapsed time: 06:31:37
Error: Total CPU time (on all processors): 11:13:20

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 01:52:18 7:50:33 4b7c2bd 4b63cf8 F238D1 108796 744 0 131.1/100.0 149.0/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160708_015218.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 01:47:07 7:46:14 4b7c2bd 4b63cf8 N/A 14106 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160707_014707.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13873 megabytes
Error: Processing ended: Thu Jul 07 09:47:00 2016
Error: Elapsed time: 06:39:38
Error: Total CPU time (on all processors): 11:47:26

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 06:36:21 2:25:16 4b7c2bd 4b63cf8 F23889 108839 744 0 132.5/100.0 132.5/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160706_063621.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 10:21:51 2:01:54 4b7c2bd 4b63cf8 N/A 14107 683 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160704_102151.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 13880 megabytes
Error: Processing ended: Mon Jul 04 18:21:45 2016
Error: Elapsed time: 1:15:34:32
Error: Total CPU time (on all processors): 2:06:41:15

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 17:41:28 23:40:11 4b7c2bd 4b63cf8 F23841 108800 744 0 133.0/100.0 153.3/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160702_174128.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 21:31:11 0:47:16 4b7c2bd 4b63cf8 N/A 13970 673 0 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160630_213111.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 0 / 0 -
Total DSP Blocks 0 / 0 -
Horizontal periphery clocks and Vertical periphery clocks 0 / 0 -

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 20:35:19 1:52:10 4b7c2bd 4b63cf8 N/A 14106 684 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160629_203519.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 77 warnings
Error: Peak virtual memory: 13791 megabytes
Error: Processing ended: Thu Jun 30 04:35:13 2016
Error: Elapsed time: 1:01:44:08
Error: Total CPU time (on all processors): 1:20:18:20

Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-28 00:29:17 6:27:42 4b7c2bd 04f33a4 F237E1 108798 744 0 126.8/100.0 142.7/155.6 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_200Mhz_Rx_EMIF_20160628_002917.tar.bz2 .


Firmware Git Logs

commit 4b7c2bd1f52aec3c62321b439f8f08ffb57d8ec8
Merge: 290f90d fe86e7f
Author: FTK User
Date: Fri Jun 24 18:00:14 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Processor_RxBasic

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2018-02-06 13:03:06 0:58:45 f76d4d5 591f0e7 F06F12 6469 629 0 133.7/100.0 231.8/200.0 Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20180206_130306.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23198 / 190240 0%
Total DSP Blocks 232 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit f76d4d5d72f3b32ac8dbe18b3ca7a552601bf186
Author: tseiss
Date: Fri Feb 2 08:05:45 2018 +0100

Added the mif file for PMA ROM

commit cc69e575b81eaf261b3694e7b3faa9bfbdfb52b6
Author: tseiss
Date: Fri Feb 2 07:51:37 2018 +0100

Added PMA ROM to RxBasic

AUXCommon Git Logs

commit 591f0e79b42c98c6e170419c4836b7e5009db5d5
Author: tseiss
Date: Fri Feb 2 08:04:28 2018 +0100

Working version of xcvr/reconfig_controller for PMA

commit 4be01e10d10cf540dd80a7e7aea13fcccf63c708
Merge: ff5beca f2e2f88
Author: tseiss
Date: Thu Jan 25 18:07:33 2018 +0100

Merged in PMAallChannels
2017-04-12 04:58:49 0:57:02 a8ab218 9ea10b2 F052EB 6184 450 0 138.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170412_045849.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 04:59:28 0:57:44 a8ab218 9ea10b2 F052D3 6184 450 0 131.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170411_045928.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 04:57:01 0:55:17 a8ab218 9ea10b2 F052BB 6184 450 0 129.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170410_045701.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 04:56:15 0:54:28 a8ab218 9ea10b2 F052A3 6184 450 0 127.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170409_045615.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 04:55:08 0:53:23 a8ab218 9ea10b2 F0528B 6184 450 0 127.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170408_045508.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 04:56:38 0:54:54 a8ab218 9ea10b2 F05273 6184 450 0 128.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170407_045638.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 04:55:10 0:53:27 a8ab218 9ea10b2 F0525B 6184 450 0 140.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170406_045510.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 04:56:46 0:55:03 a8ab218 9ea10b2 F05243 6184 450 0 135.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170405_045646.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 04:58:30 0:56:45 a8ab218 9ea10b2 F0522B 6184 450 0 133.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170404_045830.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-03 05:01:05 0:59:38 a8ab218 9ea10b2 F05213 6184 450 0 142.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170403_050105.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-02 04:58:39 0:57:06 a8ab218 9ea10b2 F051FB 6184 450 0 131.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170402_045839.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-01 04:58:44 0:57:12 a8ab218 9ea10b2 F051E3 6184 450 0 129.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170401_045844.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-31 04:58:22 0:56:47 a8ab218 9ea10b2 F051CB 6184 450 0 126.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170331_045822.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-27 04:58:37 0:57:03 a8ab218 9ea10b2 F0516B 6184 450 0 129.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170327_045837.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-26 04:56:40 0:55:07 a8ab218 9ea10b2 F05153 6184 450 0 132.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170326_045640.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-25 04:54:47 0:53:20 a8ab218 9ea10b2 F0513B 6184 450 0 129.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170325_045447.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-24 04:52:56 0:51:19 a8ab218 9ea10b2 F05123 6184 450 0 132.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170324_045256.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-23 04:54:03 0:52:34 dbfce1a 9ea10b2 F0510B 6184 450 0 133.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170323_045403.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 05:09:55 1:04:35 dbfce1a 9ea10b2 F050F3 6184 450 0 133.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170322_050955.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 04:58:31 0:56:45 dbfce1a 9ea10b2 F050DB 6184 450 0 130.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170321_045831.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-20 04:55:33 0:53:59 dbfce1a 9ea10b2 F050C3 6184 450 0 133.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170320_045533.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 04:59:33 0:57:46 dbfce1a 9ea10b2 F050AB 6184 450 0 135.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170319_045933.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 05:00:53 0:58:52 dbfce1a 9ea10b2 F05093 6184 450 0 124.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170318_050053.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-17 06:10:14 2:08:52 dbfce1a 9ea10b2 F0507B 6185 450 0 131.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170317_061014.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 04:57:11 0:55:29 dbfce1a 9ea10b2 F0504B 6184 450 0 133.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170315_045711.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 04:59:57 0:58:16 dbfce1a 9ea10b2 F05033 6184 450 0 131.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170314_045957.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 04:55:22 0:53:44 dbfce1a 9ea10b2 F0501B 6184 450 0 146.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170313_045522.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 04:58:41 0:57:01 dbfce1a 9ea10b2 F05003 6184 450 0 133.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170312_045841.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 04:59:40 0:58:06 dbfce1a 9ea10b2 F04FEC 6184 450 0 127.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170311_045940.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 05:02:59 1:01:21 dbfce1a 9ea10b2 F04FD4 6184 450 0 126.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170310_050259.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 05:01:23 0:59:38 dbfce1a 9ea10b2 F04FBC 6184 450 0 135.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170309_050123.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-08 05:01:14 0:59:38 dbfce1a 9ea10b2 F04FA4 6184 450 0 124.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170308_050114.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-02-18 04:01:06 0:00:06 a8ba1ba 9627342 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170218_040106.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 439 megabytes
Error: Processing ended: Sat Feb 18 04:01:05 2017
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 04:01:16 0:00:12 a8ba1ba 9627342 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170217_040116.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 439 megabytes
Error: Processing ended: Fri Feb 17 04:01:16 2017
Error: Elapsed time: 00:00:12
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-11 04:01:10 0:00:06 a8ba1ba ab48262 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170211_040110.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Sat Feb 11 04:01:10 2017
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-04 04:01:11 0:00:10 2f78fea 733048d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170204_040111.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Sat Feb 04 04:01:10 2017
Error: Elapsed time: 00:00:10
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-01-21 04:01:23 0:00:09 134e9bb 6aed696 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170121_040123.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Sat Jan 21 04:01:23 2017
Error: Elapsed time: 00:00:09
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 134e9bbcf48bab55291aa58be41236f8af3461fa
Author: unknown
Date: Wed Jan 18 10:04:38 2017 +0100

Update sdc for overflow monitoring

commit ba96930b5c3c1d069a30776a46ca062e8518370f
Author: unknown
Date: Mon Jan 16 17:13:55 2017 +0100

Add more freeze conditions and fifo overflow freeze

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-13 04:01:15 0:00:06 4d2c520 f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170113_040115.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Fri Jan 13 04:01:14 2017
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 04:08:25 0:00:16 0e142a4 f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20170106_040825.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Fri Jan 06 04:08:24 2017
Error: Elapsed time: 00:00:16
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 04:01:05 0:00:03 0e142a4 f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161231_040105.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Sat Dec 31 04:01:04 2016
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-17 04:04:06 0:00:14 47d515e f812395 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161217_040406.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Sat Dec 17 04:04:06 2016
Error: Elapsed time: 00:00:14
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 47d515eb68d535542f304d7d30f6e2e503d7b7f9
Author: unknown
Date: Wed Dec 14 19:13:42 2016 +0100

adding hold in HLC logic to prevent FIFOSS and FIFOIndex from overflowing

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-07 04:01:26 0:00:06 37b1abd b113c0d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161207_040126.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Wed Dec 07 04:01:26 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

commit 1ef843f74356a01fd5bd07c82a8fcc4a89396271
Author: unknown
Date: Wed Nov 30 17:14:32 2016 +0100

running on data TVs to deal with bad roads. Implemented bad road dummy hits.

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 04:01:12 0:00:06 37b1abd b113c0d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161203_040112.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Sat Dec 03 04:01:10 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

commit 1ef843f74356a01fd5bd07c82a8fcc4a89396271
Author: unknown
Date: Wed Nov 30 17:14:32 2016 +0100

running on data TVs to deal with bad roads. Implemented bad road dummy hits.

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-01 04:01:21 0:00:05 1ef843f b113c0d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161201_040121.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 441 megabytes
Error: Processing ended: Thu Dec 01 04:01:20 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 1ef843f74356a01fd5bd07c82a8fcc4a89396271
Author: unknown
Date: Wed Nov 30 17:14:32 2016 +0100

running on data TVs to deal with bad roads. Implemented bad road dummy hits.

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-30 04:01:31 0:00:05 15efccd b113c0d N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161130_040131.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 440 megabytes
Error: Processing ended: Wed Nov 30 04:01:30 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-12 04:01:58 0:00:17 15efccd 11f885e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161112_040158.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Sat Nov 12 04:01:57 2016
Error: Elapsed time: 00:00:17
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-07 04:02:11 0:00:09 15efccd 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161107_040211.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Mon Nov 07 04:02:11 2016
Error: Elapsed time: 00:00:09
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-01 04:01:36 0:00:12 15efccd 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161101_040136.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Tue Nov 01 04:01:36 2016
Error: Elapsed time: 00:00:12
Error: Total CPU time (on all processors): 00:00:02

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-28 04:01:27 0:00:06 50d42d3 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161028_040127.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Fri Oct 28 04:01:27 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-26 04:01:10 0:00:06 50d42d3 337b57e N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161026_040110.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Wed Oct 26 04:01:08 2016
Error: Elapsed time: 00:00:06
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-25 04:01:06 0:00:05 50d42d3 c92deb1 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161025_040106.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Tue Oct 25 04:01:06 2016
Error: Elapsed time: 00:00:05
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

AUXCommon Git Logs

commit c92deb1a6ca50f978487919c40415efc261ffebc
Merge: dcf31e5 800b606
Author: FTK User
Date: Mon Oct 24 12:01:36 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 800b606fe85acaa6c85e8ac01f3e5a59484f8753
Author: unknown
Date: Mon Oct 24 17:14:05 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR
2016-10-11 04:01:40 0:00:04 e9b6470 810d361 N/A 27 0 6 - - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20161011_040140.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 0 warnings
Error: Peak virtual memory: 444 megabytes
Error: Processing ended: Tue Oct 11 04:01:39 2016
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-29 04:53:37 0:52:11 06c7484 e61013c F040A3 6177 390 0 139.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160929_045337.tar.bz2 .


Firmware Git Logs

commit 06c7484307b847375dad25ed4805d67bdb49b280
Author: unknown
Date: Wed Sep 28 19:21:49 2016 +0200

fix rxmonitor and add ability to freeze without TF enabled

commit 17b76abbeec82de868e784ee862f45f159daf395
Author: unknown
Date: Wed Sep 28 13:03:02 2016 +0200

Fix backpressure issue from TF when road spamming. Reduce FIFO sizes to try and free up some space. Adding Road error protection and FREEZEs

AUXCommon Git Logs

commit e61013c507674e69f76a287f3e13f4223e25b3f4
Author: FTK User
Date: Wed Sep 28 16:46:48 2016 -0700

Windows rebase messes up x permissions.

commit 6b5d5faa033e34b8e9411ba4ecda82d49ef9d06b
Author: FTK User
Date: Wed Sep 28 16:45:27 2016 -0700

Update nightly.sh to Quartus 16.0
2016-08-16 04:45:36 0:44:16 f873fc1 4b63cf8 F03C83 6184 380 0 142.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160816_044536.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23054 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-15 04:45:48 0:44:30 f873fc1 4b63cf8 F03C6B 6184 380 0 107.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160815_044548.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23130 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 04:45:02 0:43:48 f873fc1 4b63cf8 F03C53 6184 380 0 137.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160814_044502.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23108 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 04:46:52 0:44:32 f873fc1 4b63cf8 F03C3B 6184 380 0 121.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160813_044652.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-12 04:48:47 0:47:29 f873fc1 4b63cf8 F03C23 6184 380 0 139.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160812_044847.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 04:45:49 0:44:32 f873fc1 4b63cf8 F03C0B 6184 380 0 138.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160811_044549.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 04:46:40 0:45:19 f873fc1 4b63cf8 F03BF3 6184 380 0 142.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160810_044640.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 04:49:25 0:47:55 f873fc1 4b63cf8 F03BDB 6184 380 0 140.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160809_044925.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 04:49:40 0:48:17 f873fc1 4b63cf8 F03BC3 6184 380 0 136.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160808_044940.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 04:45:42 0:44:18 f873fc1 4b63cf8 F03BAB 6184 380 0 143.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160807_044542.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23103 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 05:48:08 1:46:37 f873fc1 4b63cf8 F03B93 6184 380 0 135.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160806_054808.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 10:11:19 6:08:49 f873fc1 4b63cf8 F02D12 6185 380 0 135.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160805_101119.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 04:46:14 0:44:47 f873fc1 4b63cf8 F03B63 6184 380 0 113.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160804_044614.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 04:48:35 0:47:11 f873fc1 4b63cf8 F03B4B 6184 380 0 134.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160803_044835.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1150): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Input2/RxROS/Rx.vhd Line: 1150
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 5 warnings
Error: Peak virtual memory: 980 megabytes
Error: Processing ended: Wed Mar 15 03:01:37 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:13

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 04:44:48 0:43:26 f873fc1 4b63cf8 F03B33 6184 380 0 116.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160802_044448.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Fri Nov 25 18:00:56 2016
Error: Elapsed time: 00:00:35
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 04:46:29 0:45:08 f873fc1 4b63cf8 F03B1B 6184 380 0 134.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160801_044629.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 04:46:17 0:44:55 f873fc1 4b63cf8 F03B03 6184 380 0 142.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160731_044617.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 04:45:46 0:44:22 f873fc1 4b63cf8 F03AEB 6184 380 0 128.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160730_044546.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 04:45:26 0:44:01 f873fc1 4b63cf8 F03AD3 6184 380 0 135.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160729_044526.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 04:45:55 0:44:34 80e6e88 4b63cf8 F03ABB 6184 380 0 129.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160728_044555.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23123 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 04:44:38 0:43:17 80e6e88 4b63cf8 F03AA3 6184 380 0 108.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160727_044438.tar.bz2 .


Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 04:46:15 0:44:54 80e6e88 4b63cf8 F03A8B 6184 380 0 143.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160726_044615.tar.bz2 .


Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 04:45:52 0:44:28 80e6e88 4b63cf8 F03A73 6184 380 0 128.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160725_044552.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23116 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 04:43:03 0:41:42 80e6e88 4b63cf8 F03A5B 6184 380 0 136.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160724_044303.tar.bz2 .


Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 04:46:11 0:44:42 80e6e88 4b63cf8 F03A43 6184 380 0 142.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160723_044611.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23085 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 04:44:15 0:42:35 fe86e7f 4b63cf8 F03A2B 6184 380 0 134.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160722_044415.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 04:44:32 0:43:21 fe86e7f 4b63cf8 F03A13 6184 380 0 135.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160721_044432.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 04:43:47 0:42:24 fe86e7f 4b63cf8 F039FB 6184 380 0 137.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160720_044347.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23087 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-19 04:43:20 0:42:02 fe86e7f 4b63cf8 F039E3 6184 380 0 130.6/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160719_044320.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 04:42:24 0:41:11 fe86e7f 4b63cf8 F039CB 6184 380 0 145.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160718_044224.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 04:45:04 0:43:51 fe86e7f 4b63cf8 F039B3 6184 380 0 140.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160717_044504.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 05:39:38 1:36:43 fe86e7f 4b63cf8 F0399B 6184 380 0 137.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160716_053938.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-15 05:00:29 0:58:53 fe86e7f 4b63cf8 F03983 6184 380 0 128.3/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160715_050029.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23103 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 04:59:52 0:58:16 fe86e7f 4b63cf8 F0396B 6184 380 0 135.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160714_045952.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 05:03:18 1:01:43 fe86e7f 4b63cf8 F03953 6184 380 0 133.7/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160713_050318.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 05:00:50 0:59:12 fe86e7f 4b63cf8 F0393B 6184 380 0 130.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160712_050050.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 05:01:18 0:59:37 fe86e7f 4b63cf8 F03923 6184 380 0 132.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160711_050118.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23076 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 05:01:11 0:59:33 fe86e7f 4b63cf8 F0390B 6184 380 0 141.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160710_050111.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 05:00:07 0:58:33 fe86e7f 4b63cf8 F038F3 6184 380 0 135.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160709_050007.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 04:59:56 0:58:24 fe86e7f 4b63cf8 F038DB 6184 380 0 137.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160708_045956.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 04:59:20 0:57:42 fe86e7f 4b63cf8 F038C3 6184 380 0 136.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160707_045920.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 10:56:09 6:52:34 fe86e7f 4b63cf8 F038AB 6185 380 0 146.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160706_105609.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23117 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-05 14:27:04 10:23:17 fe86e7f 4b63cf8 F02D12 6185 380 0 133.1/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160705_142704.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-04 07:05:06 3:03:11 fe86e7f 4b63cf8 F0387B 6185 380 0 139.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160704_070506.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-03 11:58:03 7:53:12 fe86e7f 4b63cf8 F03863 6185 380 0 139.8/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160703_115803.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Wed Oct 26 18:00:52 2016
Error: Elapsed time: 00:00:32
Error: Total CPU time (on all processors): 00:00:12

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-02 09:07:51 5:04:06 fe86e7f 4b63cf8 F0384B 6185 380 0 129.9/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160702_090751.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-01 04:50:17 0:48:54 fe86e7f 4b63cf8 F03833 6184 380 0 137.4/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160701_045017.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 04:44:33 0:43:14 fe86e7f 4b63cf8 F0381B 6184 380 0 142.0/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160630_044433.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-29 10:35:33 6:32:57 fe86e7f 4b63cf8 F03803 6185 380 0 138.2/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160629_103533.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-28 04:49:05 0:47:23 fe86e7f 04f33a4 F037EB 6184 380 0 129.5/100.0 - Rx
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_RxBasic_20160628_044905.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 23132 / 190240 0%
Total DSP Blocks 227 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 0 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd


Processor_Rx_EMIF

Compile Running  
Date Duration Firmware AUXCommon Version nInfo nWarnings nErrors fMax[0] fMax[1] Revision
2017-04-12 14:07:15 8:04:56 a8ab218 9ea10b2 F252ED 109741 1641 0 133.0/100.0 166.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170412_140715.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-11 13:09:06 7:06:55 a8ab218 9ea10b2 F252D5 109741 1641 0 131.7/100.0 165.0/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170411_130906.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-10 13:03:28 7:01:21 a8ab218 9ea10b2 F252BD 109741 1641 0 126.1/100.0 166.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170410_130328.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-09 13:35:47 7:33:36 a8ab218 9ea10b2 F252A5 109741 1641 0 134.2/100.0 162.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170409_133547.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-08 13:09:13 7:07:09 a8ab218 9ea10b2 F2528D 109741 1641 0 130.3/100.0 159.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170408_130913.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-07 13:13:44 7:11:38 a8ab218 9ea10b2 F25275 109741 1641 0 127.5/100.0 166.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170407_131344.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-06 13:37:37 7:35:24 a8ab218 9ea10b2 F2525D 109741 1642 0 136.8/100.0 160.2/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170406_133737.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-05 13:11:00 7:08:55 a8ab218 9ea10b2 F25245 109741 1643 0 131.3/100.0 164.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170405_131100.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-04 13:34:30 7:32:21 a8ab218 9ea10b2 F2522D 109741 1641 0 130.5/100.0 165.2/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170404_133430.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-03 13:48:28 7:46:33 a8ab218 9ea10b2 F25215 109742 1641 0 130.4/100.0 163.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170403_134828.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-02 13:12:25 7:10:18 a8ab218 9ea10b2 F251FD 109741 1642 0 132.1/100.0 159.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170402_131225.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-04-01 13:12:07 7:10:27 a8ab218 9ea10b2 F251E5 109741 1641 0 131.7/100.0 138.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170401_131207.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-27 13:02:58 7:01:11 a8ab218 9ea10b2 F2516D 109741 1641 0 132.8/100.0 163.2/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170327_130258.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-26 13:07:25 7:05:36 a8ab218 9ea10b2 F25155 109741 1641 0 128.3/100.0 166.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170326_130725.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-25 14:16:33 8:14:50 a8ab218 9ea10b2 F2513D 109756 1647 0 130.8/100.0 159.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170325_141633.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-24 13:02:27 7:00:29 a8ab218 9ea10b2 F25125 109741 1641 0 130.9/100.0 166.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170324_130227.tar.bz2 .


Firmware Git Logs

commit a8ab2188f92ba4bd5943157d99664a0b7ff12822
Author: unknown
Date: Thu Mar 23 12:08:13 2017 +0100

fix sdc

commit c6255be1771cef784f2c8f2e859c1b886cb95063
Author: unknown
Date: Thu Mar 23 11:56:50 2017 +0100

setup fitter settings and sdc file

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-23 12:48:25 6:46:39 dbfce1a 9ea10b2 F2510D 110530 1869 0 137.1/100.0 163.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170323_124825.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-22 13:48:56 7:43:08 dbfce1a 9ea10b2 F250F5 110530 1869 0 136.8/100.0 165.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170322_134856.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-21 08:56:33 FAILED
2017-03-20 13:27:34 7:25:59 dbfce1a 9ea10b2 F250C5 110530 1869 0 135.3/100.0 157.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170320_132734.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-19 13:27:47 7:25:40 dbfce1a 9ea10b2 F250AD 110530 1869 0 130.1/100.0 163.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170319_132747.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-18 13:16:12 7:14:00 dbfce1a 9ea10b2 F25095 110530 1869 0 135.7/100.0 157.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170318_131612.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-17 09:30:36 2:35:10 dbfce1a 9ea10b2 F24C8E 110593 1870 0 129.6/100.0 77.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170317_093036.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-15 13:23:14 7:21:10 dbfce1a 9ea10b2 F2504D 110530 1869 0 125.1/100.0 162.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170315_132314.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-14 14:46:26 8:44:22 dbfce1a 9ea10b2 F25035 110546 1875 0 138.7/100.0 158.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170314_144626.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-13 12:57:12 6:55:02 dbfce1a 9ea10b2 F2501D 110530 1869 0 127.8/100.0 160.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170313_125712.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-12 14:09:34 8:07:34 dbfce1a 9ea10b2 F25005 110542 1875 0 133.3/100.0 164.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170312_140934.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-11 13:33:19 7:31:15 dbfce1a 9ea10b2 F24FEE 110530 1869 0 134.2/100.0 160.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170311_133319.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-10 13:33:22 7:31:22 dbfce1a 9ea10b2 F24FD6 110530 1869 0 133.1/100.0 160.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170310_133322.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 13:34:33 7:32:28 dbfce1a 9ea10b2 F24FBE 110530 1869 0 138.0/100.0 157.9/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170309_133433.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-09 02:22:31 20:20:36 dbfce1a 9ea10b2 F24FA6 110569 1869 0 120.3/100.0 94.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170309_022231.tar.bz2 .


Firmware Git Logs

commit dbfce1ab6d568f695dfafedc466534c39a1e2b22
Author: Karol Krizka
Date: Tue Mar 7 15:15:30 2017 -0800

Bug fix to get RxBasic to compile.

commit 3e46677c7fa25a68322d661783c7ede18a6ac68b
Author: Karol Krizka
Date: Tue Mar 7 11:58:28 2017 -0600

Merged some changed from Rx_EMIF to RxBasic.

AUXCommon Git Logs

commit 9ea10b2379a3919e4ef3bd2e1ff1c59f2f2df4a4
Merge: 1162096 1ad0a25
Author: FTK User
Date: Tue Mar 7 21:00:32 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 1162096b19d14baa07176d9f76038e85c7b8ad7a
Merge: 3a476d4 a4bb9ac
Author: FTK User
Date: Tue Mar 7 18:00:20 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2017-03-07 13:34:12 7:32:38 78a7ad1 9627342 F24F8E 110531 1868 0 129.4/100.0 162.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170307_133412.tar.bz2 .


Firmware Git Logs

commit 78a7ad1c9aed9bd4ef7029390ec6fd650f5ba17c
Author: Chicago1\rzou
Date: Fri Mar 3 23:24:47 2017 +0100

fixing track fitter resets

commit 056ddc5752145b44e97de0afd6492b68e02a3ef1
Author: Karol Krizka
Date: Wed Mar 1 16:11:13 2017 -0600

Attempt at updating RxBasic top-level file.

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-06 13:54:16 7:52:17 78a7ad1 9627342 F24F76 110529 1869 0 131.8/100.0 166.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170306_135416.tar.bz2 .


Firmware Git Logs

commit 78a7ad1c9aed9bd4ef7029390ec6fd650f5ba17c
Author: Chicago1\rzou
Date: Fri Mar 3 23:24:47 2017 +0100

fixing track fitter resets

commit 056ddc5752145b44e97de0afd6492b68e02a3ef1
Author: Karol Krizka
Date: Wed Mar 1 16:11:13 2017 -0600

Attempt at updating RxBasic top-level file.

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-05 13:35:37 7:33:44 78a7ad1 9627342 F24F5E 110529 1868 0 138.3/100.0 164.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170305_133537.tar.bz2 .


Firmware Git Logs

commit 78a7ad1c9aed9bd4ef7029390ec6fd650f5ba17c
Author: Chicago1\rzou
Date: Fri Mar 3 23:24:47 2017 +0100

fixing track fitter resets

commit 056ddc5752145b44e97de0afd6492b68e02a3ef1
Author: Karol Krizka
Date: Wed Mar 1 16:11:13 2017 -0600

Attempt at updating RxBasic top-level file.

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-04 14:05:23 8:03:21 78a7ad1 9627342 F24F46 110529 1868 0 140.5/100.0 165.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170304_140523.tar.bz2 .


Firmware Git Logs

commit 78a7ad1c9aed9bd4ef7029390ec6fd650f5ba17c
Author: Chicago1\rzou
Date: Fri Mar 3 23:24:47 2017 +0100

fixing track fitter resets

commit 056ddc5752145b44e97de0afd6492b68e02a3ef1
Author: Karol Krizka
Date: Wed Mar 1 16:11:13 2017 -0600

Attempt at updating RxBasic top-level file.

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-03 13:29:36 7:27:40 056ddc5 9627342 F24F2E 110943 357 0 133.2/100.0 162.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170303_132936.tar.bz2 .


Firmware Git Logs

commit 056ddc5752145b44e97de0afd6492b68e02a3ef1
Author: Karol Krizka
Date: Wed Mar 1 16:11:13 2017 -0600

Attempt at updating RxBasic top-level file.

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-02 13:29:45 7:27:42 056ddc5 9627342 F24F16 110943 357 0 141.2/100.0 163.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170302_132945.tar.bz2 .


Firmware Git Logs

commit 056ddc5752145b44e97de0afd6492b68e02a3ef1
Author: Karol Krizka
Date: Wed Mar 1 16:11:13 2017 -0600

Attempt at updating RxBasic top-level file.

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-03-01 14:21:04 8:19:05 c1f9771 9627342 F24EFE 110946 375 0 132.8/100.0 161.9/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170301_142104.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-28 14:04:23 8:02:23 c1f9771 9627342 F24EE6 110946 357 0 131.8/100.0 166.0/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170228_140423.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-27 13:13:23 7:11:19 c1f9771 9627342 F24ECE 110943 357 0 123.1/100.0 165.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170227_131323.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-26 13:34:27 7:32:24 c1f9771 9627342 F24EB6 110943 357 0 134.8/100.0 164.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170226_133427.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-25 14:27:15 8:25:09 c1f9771 9627342 F24E9E 110946 357 0 125.2/100.0 160.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170225_142715.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-24 13:40:13 7:38:09 c1f9771 9627342 F24E86 110943 357 0 126.4/100.0 164.5/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170224_134013.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-23 14:06:07 8:03:55 c1f9771 9627342 F24E6E 110943 357 0 133.6/100.0 164.2/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170223_140607.tar.bz2 .


Firmware Git Logs

commit c1f977109c983df693fdf73adea8e06e428c02ff
Author: Chicago1\rzou
Date: Wed Feb 22 18:26:45 2017 +0100

adding sector list for data_tower22_1Evt for proc4

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-22 13:44:19 7:42:16 a8ba1ba 9627342 F24E56 110943 357 0 134.5/100.0 160.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170222_134419.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-21 13:32:27 7:30:24 a8ba1ba 9627342 F24E3E 110943 357 0 133.6/100.0 164.5/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170221_133227.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-20 13:40:08 7:38:10 a8ba1ba 9627342 F24E26 110943 357 0 143.6/100.0 156.2/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170220_134008.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-19 13:20:53 7:18:53 a8ba1ba 9627342 F24E0E 110943 357 0 125.5/100.0 164.0/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170219_132053.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-18 13:33:20 7:31:18 a8ba1ba 9627342 F24DF6 110943 357 0 130.7/100.0 163.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170218_133320.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-17 13:29:59 7:27:12 a8ba1ba 9627342 F24DDE 110943 357 0 127.9/100.0 157.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170217_132959.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 96273420b38f26f2bd5c437d020d16cd51e75d5f
Merge: ab48262 3c6b84c
Author: FTK User
Date: Thu Feb 16 18:00:21 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3c6b84c3d3bf1b266ed82334ebf698d068d9cfa5
Author: unknown
Date: Thu Feb 16 21:24:28 2017 +0100

fixes to monitoring
2017-02-16 13:13:03 7:10:54 a8ba1ba ab48262 F24DC6 110943 357 0 139.2/100.0 162.9/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170216_131303.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-12 13:52:51 7:50:47 a8ba1ba ab48262 F24D66 110946 357 0 133.2/100.0 160.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170212_135251.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-11 17:07:41 11:06:06 a8ba1ba ab48262 F24D4E 110955 357 0 125.9/100.0 114.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170211_170741.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-10 13:44:43 7:42:42 a8ba1ba ab48262 F24D36 110943 357 0 135.9/100.0 162.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170210_134443.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-09 13:37:50 7:35:49 a8ba1ba ab48262 F24D1E 110946 357 0 132.3/100.0 163.9/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170209_133750.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 122776 / 190240 0%
Total DSP Blocks 1722 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-08 13:43:43 7:41:44 a8ba1ba ab48262 F24D06 110943 357 0 130.6/100.0 166.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170208_134343.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-07 14:06:42 8:04:30 a8ba1ba ab48262 F24CEE 110946 357 0 127.8/100.0 165.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170207_140642.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 122740 / 190240 0%
Total DSP Blocks 1722 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit ab482628fb740e5b3c56dabcb6897a6cada59ef6
Merge: 6d928dd ab2e9a5
Author: FTK User
Date: Tue Feb 7 06:00:48 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ab2e9a53f5bcd552ff7fcd6875e48d98be2e9577
Author: unknown
Date: Tue Feb 7 11:43:13 2017 +0100

fix road fifo loading
2017-02-06 13:05:52 7:03:10 a8ba1ba 6d928dd F24CD6 110923 336 0 134.6/100.0 156.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170206_130552.tar.bz2 .


Firmware Git Logs

commit a8ba1bab166fd1620dbc7956759c78e4f2719e55
Author: unknown
Date: Mon Feb 6 11:47:38 2017 +0100

Monitoring appears to be working as expected. Optimizing fifo depths and almost full values

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

AUXCommon Git Logs

commit 6d928dd1a75a5ca5dc2335d91eaafa31a520058d
Merge: 733048d 6e4d193
Author: FTK User
Date: Mon Feb 6 06:01:41 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6e4d1937c3f6b9346bde0b544545379ad78f3a62
Author: unknown
Date: Mon Feb 6 11:48:19 2017 +0100

Improve almost full values and add monitoring features
2017-02-05 14:09:23 8:07:16 2f78fea 733048d F24CBE 110944 680 0 129.2/100.0 165.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170205_140923.tar.bz2 .


Firmware Git Logs

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-04 14:06:36 8:04:58 2f78fea 733048d F24CA6 110944 680 0 129.8/100.0 163.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170204_140636.tar.bz2 .


Firmware Git Logs

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-03 13:58:28 7:56:23 2f78fea 733048d F24C8E 110941 680 0 128.5/100.0 160.8/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170203_135828.tar.bz2 .


Firmware Git Logs

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-02 13:48:05 7:46:00 2f78fea 733048d F24C76 110941 680 0 134.7/100.0 163.9/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170202_134805.tar.bz2 .


Firmware Git Logs

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-02-01 14:04:36 8:02:14 2f78fea 733048d F24C5E 110944 680 0 130.0/100.0 153.3/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170201_140436.tar.bz2 .


Firmware Git Logs

commit 2f78fea4073329e064e3d4ebc97e0703d54aaa6f
Author: unknown
Date: Wed Feb 1 11:02:58 2017 +0100

Added holdfraction monitoring for hold from TF

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

AUXCommon Git Logs

commit 733048d58cef54b1f772bd84ee48b3b2e887b3cb
Merge: 1abcab8 e3dcb0d
Author: FTK User
Date: Wed Feb 1 06:01:02 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit e3dcb0da5632019dcfa06be9f3520a236f570fef
Author: unknown
Date: Wed Feb 1 11:03:37 2017 +0100

Improve monitoring and ssmap timing
2017-01-31 13:28:36 7:26:35 131f128 1abcab8 F24C46 110457 672 0 130.6/100.0 164.6/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170131_132836.tar.bz2 .


Firmware Git Logs

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 65d7fbc98c2666af0397265d0c7cc1f97b793784
Author: Chicago1\rzou
Date: Fri Jan 27 14:22:38 2017 +0100

fixing a bug in NomFitter (wrong chi2 cut (opposite) when doing rec fit)

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-30 14:24:27 8:22:18 131f128 1abcab8 F24C2E 110457 672 0 131.7/100.0 164.0/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170130_142427.tar.bz2 .


Firmware Git Logs

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 65d7fbc98c2666af0397265d0c7cc1f97b793784
Author: Chicago1\rzou
Date: Fri Jan 27 14:22:38 2017 +0100

fixing a bug in NomFitter (wrong chi2 cut (opposite) when doing rec fit)

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-29 14:00:00 7:57:57 131f128 1abcab8 F24C16 110457 672 0 136.8/100.0 166.1/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170129_140000.tar.bz2 .


Firmware Git Logs

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 65d7fbc98c2666af0397265d0c7cc1f97b793784
Author: Chicago1\rzou
Date: Fri Jan 27 14:22:38 2017 +0100

fixing a bug in NomFitter (wrong chi2 cut (opposite) when doing rec fit)

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-28 13:46:50 7:44:47 131f128 1abcab8 F24BFE 110454 672 0 128.6/100.0 160.7/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170128_134650.tar.bz2 .


Firmware Git Logs

commit 131f12880152d0e69c65b3bc23f5ef8ff823297c
Merge: 65d7fbc 05c03a0
Author: U-Chicago1\rzou
Date: Fri Jan 27 14:29:34 2017 +0100

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/Processor_1_20141030

commit 65d7fbc98c2666af0397265d0c7cc1f97b793784
Author: Chicago1\rzou
Date: Fri Jan 27 14:22:38 2017 +0100

fixing a bug in NomFitter (wrong chi2 cut (opposite) when doing rec fit)

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-27 13:58:58 7:56:52 05c03a0 1abcab8 F24BE6 110456 674 0 138.2/100.0 163.4/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170127_135858.tar.bz2 .


Firmware Git Logs

commit 05c03a054ef5d3e01c45ad980d13c6c302232fa5
Author: unknown
Date: Wed Jan 25 05:52:27 2017 +0100

Closes timing at 160MHz!!

commit 14940b20e19121422431b4618d416ca5f6cabf76
Author: unknown
Date: Wed Jan 25 00:05:38 2017 +0100

fix TF sdc multicycle paths. Add DO fitter settings to help with EMIF timing

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-26 14:21:06 8:19:08 05c03a0 1abcab8 F24BCE 110459 674 0 134.8/100.0 163.9/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170126_142106.tar.bz2 .


Firmware Git Logs

commit 05c03a054ef5d3e01c45ad980d13c6c302232fa5
Author: unknown
Date: Wed Jan 25 05:52:27 2017 +0100

Closes timing at 160MHz!!

commit 14940b20e19121422431b4618d416ca5f6cabf76
Author: unknown
Date: Wed Jan 25 00:05:38 2017 +0100

fix TF sdc multicycle paths. Add DO fitter settings to help with EMIF timing

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-25 13:59:27 7:57:37 05c03a0 1abcab8 F24BB6 110456 674 0 128.2/100.0 162.2/160.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170125_135927.tar.bz2 .


Firmware Git Logs

commit 05c03a054ef5d3e01c45ad980d13c6c302232fa5
Author: unknown
Date: Wed Jan 25 05:52:27 2017 +0100

Closes timing at 160MHz!!

commit 14940b20e19121422431b4618d416ca5f6cabf76
Author: unknown
Date: Wed Jan 25 00:05:38 2017 +0100

fix TF sdc multicycle paths. Add DO fitter settings to help with EMIF timing

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-24 13:40:08 7:38:15 7a8ce29 1abcab8 F24B9E 110490 774 0 133.8/100.0 156.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170124_134008.tar.bz2 .


Firmware Git Logs

commit 7a8ce295afc4acb987bd6fdc5abd42b32c2c4b80
Author: unknown
Date: Tue Jan 24 10:09:47 2017 +0100

Eliminate writing to HCM on end event words

commit 6d2532d267a5ac91d81f610ac7df3ee51f08df74
Author: unknown
Date: Mon Jan 23 19:31:18 2017 +0100

improve DO stability and fix some write mode bugs and eor flags. Also fix path for TF fitter settings.

AUXCommon Git Logs

commit 1abcab8da60e4360aeffcc551a760138bb58db59
Merge: 6aed696 bf8da52
Author: FTK User
Date: Mon Jan 23 18:00:38 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit bf8da5236ea0d4f6faef5a0b0df84958a45128f5
Author: unknown
Date: Mon Jan 23 19:33:43 2017 +0100

improve overflow monitoring
2017-01-23 13:46:03 7:44:05 134e9bb 6aed696 F24B86 110573 773 0 130.2/100.0 153.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170123_134603.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115560 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 134e9bbcf48bab55291aa58be41236f8af3461fa
Author: unknown
Date: Wed Jan 18 10:04:38 2017 +0100

Update sdc for overflow monitoring

commit ba96930b5c3c1d069a30776a46ca062e8518370f
Author: unknown
Date: Mon Jan 16 17:13:55 2017 +0100

Add more freeze conditions and fifo overflow freeze

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-22 15:16:47 9:14:53 134e9bb 6aed696 F24B6E 110576 773 0 136.4/100.0 152.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170122_151647.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115532 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 134e9bbcf48bab55291aa58be41236f8af3461fa
Author: unknown
Date: Wed Jan 18 10:04:38 2017 +0100

Update sdc for overflow monitoring

commit ba96930b5c3c1d069a30776a46ca062e8518370f
Author: unknown
Date: Mon Jan 16 17:13:55 2017 +0100

Add more freeze conditions and fifo overflow freeze

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-21 13:47:39 7:45:50 134e9bb 6aed696 F24B56 110573 773 0 141.2/100.0 154.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170121_134739.tar.bz2 .


Firmware Git Logs

commit 134e9bbcf48bab55291aa58be41236f8af3461fa
Author: unknown
Date: Wed Jan 18 10:04:38 2017 +0100

Update sdc for overflow monitoring

commit ba96930b5c3c1d069a30776a46ca062e8518370f
Author: unknown
Date: Mon Jan 16 17:13:55 2017 +0100

Add more freeze conditions and fifo overflow freeze

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-20 14:50:44 8:48:57 134e9bb 6aed696 F24B3E 110585 779 0 127.7/100.0 155.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170120_145044.tar.bz2 .


Firmware Git Logs

commit 134e9bbcf48bab55291aa58be41236f8af3461fa
Author: unknown
Date: Wed Jan 18 10:04:38 2017 +0100

Update sdc for overflow monitoring

commit ba96930b5c3c1d069a30776a46ca062e8518370f
Author: unknown
Date: Mon Jan 16 17:13:55 2017 +0100

Add more freeze conditions and fifo overflow freeze

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-19 13:09:47 7:00:16 N/A N/A N/A 39320 764 0 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170119_130947.tar.bz2 .


Firmware Git Logs

AUXCommon Git Logs
2017-01-19 12:54:05 FAILED
2017-01-18 13:40:54 7:39:00 134e9bb 6aed696 F24B0E 110570 773 0 130.8/100.0 155.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170118_134054.tar.bz2 .


Firmware Git Logs

commit 134e9bbcf48bab55291aa58be41236f8af3461fa
Author: unknown
Date: Wed Jan 18 10:04:38 2017 +0100

Update sdc for overflow monitoring

commit ba96930b5c3c1d069a30776a46ca062e8518370f
Author: unknown
Date: Mon Jan 16 17:13:55 2017 +0100

Add more freeze conditions and fifo overflow freeze

AUXCommon Git Logs

commit 6aed696b6e408546d069d384df0ac07664d3ebe7
Merge: 04ac7d4 cc578d4
Author: FTK User
Date: Wed Jan 18 04:00:46 2017 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit cc578d43d44b16b2264f4c852083dcf42293db26
Author: unknown
Date: Wed Jan 18 10:04:03 2017 +0100

fix clock domain crossing, requires update to sdc
2017-01-17 13:55:03 7:52:07 N/A N/A F24AF6 110577 772 0 130.2/100.0 145.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170117_135503.tar.bz2 .


Firmware Git Logs

AUXCommon Git Logs
2017-01-17 08:13:29 FAILED
2017-01-16 15:13:32 9:11:29 4d2c520 f812395 F24ADE 110579 773 0 132.6/100.0 155.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170116_151332.tar.bz2 .


Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-15 15:00:27 8:58:24 4d2c520 f812395 F24AC6 110574 773 0 136.9/100.0 150.4/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170115_150027.tar.bz2 .

Analysis Errors

Error (10346): VHDL error at Rx.vhd(1660): formal port or parameter "ignore_freeze" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/Rx_EMIF/Rx.vhd Line: 1660
Error (10784): HDL error at spy_buff_freeze_block.vhd(15): see declaration for object "ignore_freeze" File: D:/Projects/ftk/Nightlies/AUXCommon/vme/spy_buff_freeze_block.vhd Line: 15
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 11 warnings
Error: Peak virtual memory: 982 megabytes
Error: Processing ended: Wed Feb 08 18:01:05 2017
Error: Elapsed time: 00:00:42
Error: Total CPU time (on all processors): 00:00:16

Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-14 16:30:52 10:28:53 4d2c520 f812395 F24AAE 110578 773 0 134.8/100.0 147.4/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170114_163052.tar.bz2 .


Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-13 14:46:23 8:44:25 4d2c520 f812395 F24A96 110574 773 0 137.4/100.0 155.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170113_144623.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115329 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-12 14:39:13 8:37:19 4d2c520 f812395 F24A7E 110574 774 0 131.1/100.0 156.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170112_143913.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115220 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-11 16:14:24 10:12:46 4d2c520 f812395 N/A 15109 711 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170111_161424.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 79 warnings
Error: Peak virtual memory: 14463 megabytes
Error: Processing ended: Wed Jan 11 16:14:15 2017
Error: Elapsed time: 08:57:10
Error: Total CPU time (on all processors): 16:15:58

Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-10 14:24:10 8:22:09 4d2c520 f812395 F24A4E 110574 773 0 129.7/100.0 157.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170110_142410.tar.bz2 .


Firmware Git Logs

commit 4d2c52058d1bb080a0b9f7f9970773fb8d1a8c1c
Author: unknown
Date: Mon Jan 9 14:40:09 2017 +0100

upshift sectorID in TF output so that SSB gets full sectorID

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-09 14:14:27 8:12:34 0e142a4 f812395 F24A36 110574 773 0 133.5/100.0 156.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170109_141427.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115465 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-08 17:25:21 11:23:17 0e142a4 f812395 F24A1E 110583 773 0 137.8/100.0 143.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170108_172521.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-07 14:03:49 8:01:48 0e142a4 f812395 F24A06 110571 773 0 133.2/100.0 155.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170107_140349.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-06 15:13:13 9:10:21 0e142a4 f812395 F249EE 110577 773 0 135.5/100.0 147.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170106_151313.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115787 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-04 16:47:49 10:46:03 0e142a4 f812395 F249BE 110586 773 0 135.0/100.0 134.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170104_164749.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-03 12:18:46 6:17:04 0e142a4 f812395 F249A6 110571 773 0 133.6/100.0 154.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170103_121846.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-02 12:29:37 6:27:51 0e142a4 f812395 F2498E 110571 773 0 135.7/100.0 155.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170102_122937.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2017-01-01 12:44:54 6:43:08 0e142a4 f812395 F24976 110574 773 0 137.7/100.0 152.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20170101_124454.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-31 22:23:34 2:43:32 0e142a4 f812395 F247F7 110671 774 0 126.4/100.0 68.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161231_222334.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-29 22:41:58 16:40:15 0e142a4 f812395 F2492E 110604 774 0 138.9/100.0 76.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161229_224158.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-28 12:25:02 6:23:19 0e142a4 f812395 F24916 110571 773 0 127.2/100.0 156.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161228_122502.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 18:23:37 12:22:00 0e142a4 f812395 F248FE 110589 773 0 133.2/100.0 117.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161227_182337.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115339 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-27 03:59:48 21:57:57 0e142a4 f812395 F248E6 110619 774 0 127.8/100.0 57.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161227_035948.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-25 12:10:06 6:08:25 0e142a4 f812395 F248CE 110571 773 0 136.2/100.0 151.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161225_121006.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-24 17:12:13 11:10:31 0e142a4 f812395 F248B6 110586 773 0 132.1/100.0 114.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161224_171213.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 12:52:33 6:50:52 0e142a4 f812395 F24886 110574 773 0 126.4/100.0 154.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161222_125233.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-22 00:44:27 18:42:43 0e142a4 f812395 F2486E 110610 774 0 119.8/100.0 97.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161222_004427.tar.bz2 .


Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-20 11:46:58 0:42:59 0e142a4 f812395 N/A 15101 708 0 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161220_114658.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 0 / 0 -
Total DSP Blocks 0 / 0 -
Horizontal periphery clocks and Vertical periphery clocks 0 / 0 -

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-19 12:33:02 6:31:30 0e142a4 f812395 F2483E 110574 773 0 137.2/100.0 149.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161219_123302.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 115402 / 190240 0%
Total DSP Blocks 1867 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 0e142a4ae6695629de739e43c0e6313cd2673f71
Author: unknown
Date: Fri Dec 16 19:07:44 2016 +0100

bit level check is good

commit 12f418f23efaff37a24fc793c2f03eafb7892ad7
Author: unknown
Date: Fri Dec 16 10:00:40 2016 +0100

Remove unneeded monitoring. Add DO backpressure from FIFOSSs

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-18 06:01:22 0:00:43 47d515e f812395 N/A 1860 10 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161218_060122.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at DOEMIF.vhd(285): formal "hold" does not exist File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 285
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "AB_toggle" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(47): see declaration for object "AB_toggle" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 47
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "write_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(48): see declaration for object "write_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 48
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "read_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(49): see declaration for object "read_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 49
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 7 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Sun Dec 18 06:01:22 2016
Error: Elapsed time: 00:00:38
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 47d515eb68d535542f304d7d30f6e2e503d7b7f9
Author: unknown
Date: Wed Dec 14 19:13:42 2016 +0100

adding hold in HLC logic to prevent FIFOSS and FIFOIndex from overflowing

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-17 06:07:27 0:06:39 47d515e f812395 N/A 1860 10 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161217_060727.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at DOEMIF.vhd(285): formal "hold" does not exist File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 285
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "AB_toggle" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(47): see declaration for object "AB_toggle" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 47
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "write_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(48): see declaration for object "write_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 48
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "read_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(49): see declaration for object "read_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 49
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 7 errors, 11 warnings
Error: Peak virtual memory: 969 megabytes
Error: Processing ended: Sat Dec 17 06:07:26 2016
Error: Elapsed time: 00:06:25
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 47d515eb68d535542f304d7d30f6e2e503d7b7f9
Author: unknown
Date: Wed Dec 14 19:13:42 2016 +0100

adding hold in HLC logic to prevent FIFOSS and FIFOIndex from overflowing

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-16 11:11:50 FAILED
2016-12-16 06:01:16 0:00:39 47d515e f812395 N/A 1860 10 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161216_060116.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at DOEMIF.vhd(285): formal "hold" does not exist File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 285
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "AB_toggle" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(47): see declaration for object "AB_toggle" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 47
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "write_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(48): see declaration for object "write_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 48
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "read_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(49): see declaration for object "read_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 49
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 7 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Fri Dec 16 06:01:16 2016
Error: Elapsed time: 00:00:33
Error: Total CPU time (on all processors): 00:00:11

Firmware Git Logs

commit 47d515eb68d535542f304d7d30f6e2e503d7b7f9
Author: unknown
Date: Wed Dec 14 19:13:42 2016 +0100

adding hold in HLC logic to prevent FIFOSS and FIFOIndex from overflowing

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-15 06:01:14 0:00:36 47d515e f812395 N/A 1860 10 12 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161215_060114.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at DOEMIF.vhd(285): formal "hold" does not exist File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 285
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "AB_toggle" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(47): see declaration for object "AB_toggle" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 47
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "write_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(48): see declaration for object "write_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 48
Error (10346): VHDL error at DOEMIF.vhd(267): formal port or parameter "read_done" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOEMIF.vhd Line: 267
Error (10784): HDL error at DOSCTLayer.vhd(49): see declaration for object "read_done" File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/DOSCTLayer.vhd Line: 49
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 7 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Thu Dec 15 06:01:13 2016
Error: Elapsed time: 00:00:31
Error: Total CPU time (on all processors): 00:00:10

Firmware Git Logs

commit 47d515eb68d535542f304d7d30f6e2e503d7b7f9
Author: unknown
Date: Wed Dec 14 19:13:42 2016 +0100

adding hold in HLC logic to prevent FIFOSS and FIFOIndex from overflowing

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

AUXCommon Git Logs

commit f81239537995cdca3568d9d954372addc6d2cff9
Merge: e90ac0c ff2bd11
Author: FTK User
Date: Wed Dec 14 12:00:47 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit ff2bd117c970cee7aefef3a031f4a5d2f7692d7d
Author: unknown
Date: Wed Dec 14 18:04:08 2016 +0100

L1IDSyncCheck fifo was seen to overflow on board for road streams. Decreasing almost full value to 8 to help with this.
2016-12-14 17:08:20 11:06:53 f5ff81d e90ac0c F247C6 110495 749 0 130.1/100.0 154.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161214_170820.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127180 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-10 14:35:09 8:33:18 f5ff81d e90ac0c F24766 110492 749 0 139.2/100.0 151.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161210_143509.tar.bz2 .


Firmware Git Logs

commit f5ff81d9fd85bfb2bbef6f004337941a8098c872
Author: unknown
Date: Thu Dec 8 15:09:05 2016 +0100

improve freeze ignore

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

AUXCommon Git Logs

commit e90ac0cd4d45fe7144a0e82d690dee12b96c43fc
Merge: fa16ef3 3ca9fa0
Author: FTK User
Date: Fri Dec 9 06:00:42 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 3ca9fa0db4aaf5c9a0f36c31952b07c173edbd4e
Author: unknown
Date: Fri Dec 9 11:26:05 2016 +0100

fix packet merger error detection which is not currently being used
2016-12-09 13:57:22 7:55:31 N/A N/A F2474E 110492 749 0 131.6/100.0 156.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161209_135722.tar.bz2 .


Firmware Git Logs

AUXCommon Git Logs
2016-12-09 08:22:16 FAILED
2016-12-08 23:48:28 17:47:02 37b1abd b113c0d F24736 110499 751 0 128.4/100.0 153.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161208_234828.tar.bz2 .


Firmware Git Logs

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

commit 1ef843f74356a01fd5bd07c82a8fcc4a89396271
Author: unknown
Date: Wed Nov 30 17:14:32 2016 +0100

running on data TVs to deal with bad roads. Implemented bad road dummy hits.

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-04 12:48:53 6:47:15 37b1abd b113c0d F246D6 110489 751 0 138.3/100.0 155.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161204_124853.tar.bz2 .


Firmware Git Logs

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

commit 1ef843f74356a01fd5bd07c82a8fcc4a89396271
Author: unknown
Date: Wed Nov 30 17:14:32 2016 +0100

running on data TVs to deal with bad roads. Implemented bad road dummy hits.

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-12-03 23:44:52 FAILED
2016-12-03 17:52:34 11:50:51 37b1abd b113c0d F246BE 110491 751 0 130.7/100.0 155.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161203_175234.tar.bz2 .


Firmware Git Logs

commit 37b1abd1122c74d6c541434c44418e189423f328
Author: Chicago1\rzou
Date: Sat Dec 3 02:04:02 2016 +0100

adding ignore_freeze option in RxEMIF

commit 1ef843f74356a01fd5bd07c82a8fcc4a89396271
Author: unknown
Date: Wed Nov 30 17:14:32 2016 +0100

running on data TVs to deal with bad roads. Implemented bad road dummy hits.

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-28 12:33:08 6:31:43 15efccd b113c0d F24646 110489 753 0 135.2/100.0 154.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161128_123308.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127335 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-27 13:17:56 7:16:20 15efccd b113c0d F2462E 110492 752 0 131.7/100.0 151.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161127_131756.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-26 12:45:00 6:43:25 15efccd b113c0d F24616 110489 752 0 134.9/100.0 155.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161126_124500.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127653 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-25 12:27:50 6:26:18 15efccd b113c0d F245FE 110489 752 0 129.6/100.0 155.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161125_122750.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit b113c0d932b7dad0118b7a5e87c6c78d25225963
Merge: bb9d09b 174ec1d
Author: FTK User
Date: Thu Nov 24 12:00:38 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 174ec1d0f03b3c0ba766ae4ddda8dee4d754cafa
Author: Chicago1\rzou
Date: Thu Nov 24 15:15:21 2016 +0100

adding HSSpy buffer dump in modelsim and several small changes to clean no longer used signals in hit sort
2016-11-24 13:17:31 7:16:31 15efccd bb9d09b N/A 15026 690 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161124_131731.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 79 warnings
Error: Peak virtual memory: 15078 megabytes
Error: Processing ended: Thu Nov 24 13:17:26 2016
Error: Elapsed time: 06:24:55
Error: Total CPU time (on all processors): 14:16:40

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb9d09b1fcac326152c629bf90bd01f6f007f221
Merge: bb3320f 40fb5c7
Author: FTK User
Date: Wed Nov 23 18:00:37 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 40fb5c78dc7da9fd78b9c675be6b0a9a3cef2ff1
Author: U-Chicago1\rzou
Date: Wed Nov 23 23:06:48 2016 +0100

A:q

A
A
A
B
:
B
B
tsort hold propagation
2016-11-23 12:50:50 6:49:11 15efccd bb3320f F245CE 110492 752 0 138.7/100.0 154.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161123_125050.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-22 13:22:54 7:21:23 15efccd bb3320f F245B6 110492 752 0 134.3/100.0 151.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161122_132254.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-21 13:44:21 7:42:29 15efccd bb3320f F2459E 110492 752 0 131.9/100.0 154.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161121_134421.tar.bz2 .

Assignments Errors

Error (23031): Evaluation of Tcl script ../../AUXCommon/compile/RxAssignments.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 443 megabytes
Error: Processing ended: Mon Jan 23 12:01:22 2017
Error: Elapsed time: 00:00:04
Error: Total CPU time (on all processors): 00:00:01

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-20 13:35:28 7:33:38 15efccd bb3320f F24586 110492 752 0 130.1/100.0 154.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161120_133528.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor_200Mhz/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 984 megabytes
Error: Processing ended: Sun Nov 27 18:01:00 2016
Error: Elapsed time: 00:00:39
Error: Total CPU time (on all processors): 00:00:14

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-19 14:36:00 8:34:06 15efccd bb3320f F2456E 110495 752 0 130.7/100.0 144.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161119_143600.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-18 13:35:16 7:33:32 15efccd bb3320f F24556 110492 752 0 127.8/100.0 152.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161118_133516.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-17 12:35:46 6:34:12 15efccd bb3320f F2453E 110489 752 0 132.3/100.0 156.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161117_123546.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-16 12:42:13 6:40:35 15efccd bb3320f F24526 110492 752 0 136.7/100.0 155.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161116_124213.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127400 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-15 13:06:04 7:04:30 15efccd bb3320f F2450E 110492 752 0 129.8/100.0 151.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161115_130604.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit bb3320f14b5064596afb11e372fc0ef70a5b7aa3
Merge: 11f885e f1b69cd
Author: FTK User
Date: Mon Nov 14 12:01:55 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit f1b69cd6f10077012ee5de1c470ade4f9eea1201
Author: U-Chicago1\rzou
Date: Mon Nov 14 17:48:32 2016 +0100

B:s
ng looping when hitsort is not enable
2016-11-14 12:09:34 6:07:59 15efccd 11f885e F244F6 110489 752 0 136.5/100.0 154.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161114_120934.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-13 12:13:40 6:12:11 15efccd 11f885e F244DE 110489 752 0 135.0/100.0 152.4/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161113_121340.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127110 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-12 12:19:05 6:16:50 15efccd 11f885e F244C6 110489 752 0 130.4/100.0 153.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161112_121905.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-10 12:30:33 6:28:57 15efccd 11f885e F24496 110492 752 0 137.0/100.0 150.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161110_123033.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-09 12:08:56 6:07:24 15efccd 11f885e F2447E 110489 752 0 129.5/100.0 154.4/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161109_120856.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 11f885e9b0826dc60a936dd752483b584ed90613
Merge: 337b57e 8b03fcf
Author: FTK User
Date: Tue Nov 8 12:01:34 2016 -0800

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 8b03fcf16e1d3bca7dca6b43ae96b347977ef44c
Author: Chicago1\rzou
Date: Tue Nov 8 14:22:07 2016 +0100

more commits for hs synchronization purposes
2016-11-08 18:58:36 12:57:00 N/A N/A F24466 110493 752 0 132.5/100.0 149.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161108_185836.tar.bz2 .


Firmware Git Logs

AUXCommon Git Logs
2016-11-08 15:52:55 FAILED
2016-11-07 15:25:12 1:53:45 15efccd 337b57e N/A 15028 690 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161107_152512.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 79 warnings
Error: Peak virtual memory: 14887 megabytes
Error: Processing ended: Mon Nov 07 15:25:04 2016
Error: Elapsed time: 1:08:38:52
Error: Total CPU time (on all processors): 2:18:54:29

Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-11-01 12:32:11 6:30:53 15efccd 337b57e F243BD 110489 755 0 136.4/100.0 153.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161101_123211.tar.bz2 .


Firmware Git Logs

commit 15efccd421a785b9627bdd391bfd26774e9039ec
Author: unknown
Date: Mon Oct 31 12:58:01 2016 +0100

fix spy_request name

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-30 05:03:19 FAILED
2016-10-28 06:02:06 0:00:51 50d42d3 337b57e N/A 1860 10 16 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161028_060206.tar.bz2 .

Analysis Errors

Error (10349): VHDL Association List error at InputHitFIFOs.vhdl(95): formal "spy_data_request" does not exist File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/InputHitFIFOs.vhdl Line: 95
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "spy_request" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(22): see declaration for object "spy_request" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 22
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "test_mode" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(34): see declaration for object "test_mode" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 34
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_wren" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(35): see declaration for object "vme_wren" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 35
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_ds" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(36): see declaration for object "vme_ds" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 36
Error (10346): VHDL error at InputHitFIFOs.vhdl(85): formal port or parameter "vme_data" must have actual or default value File: D:/Projects/ftk/Nightlies/Processor/MergedDO/project/InputHitFIFOs.vhdl Line: 85
Error (10784): HDL error at aux_logic_fifo.vhd(37): see declaration for object "vme_data" File: D:/Projects/ftk/Nightlies/AUXCommon/testing/aux_logic_fifo.vhd Line: 37
Error: Quartus Prime Analysis & Synthesis was unsuccessful. 11 errors, 11 warnings
Error: Peak virtual memory: 987 megabytes
Error: Processing ended: Fri Oct 28 06:02:05 2016
Error: Elapsed time: 00:00:46
Error: Total CPU time (on all processors): 00:00:09

Firmware Git Logs

commit 50d42d33234333c16ac64f8d6341a12108113fb5
Author: unknown
Date: Mon Oct 24 17:14:24 2016 +0200

switch to long freeze pulse for freeze going off chip. Also remove freeze_req bit from pulse OR

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

AUXCommon Git Logs

commit 337b57e45443189f770afd11d29b75da7b5447a3
Merge: c92deb1 5f80646
Author: FTK User
Date: Tue Oct 25 12:00:55 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 5f80646da71fc97c7ad5efef95702a0b1b1945d4
Author: unknown
Date: Tue Oct 25 17:09:34 2016 +0200

block module trailers. Significantly improved spybuffer freezing and freeze propagation
2016-10-23 12:32:23 6:30:47 e9b6470 dcf31e5 F242E5 110491 754 0 136.6/100.0 156.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161023_123223.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-22 12:59:49 6:58:16 e9b6470 dcf31e5 F242CD 110494 754 0 135.6/100.0 154.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161022_125949.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127381 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-21 12:42:45 6:41:02 e9b6470 dcf31e5 F242B5 110491 754 0 133.7/100.0 153.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161021_124245.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-20 13:17:08 7:16:05 e9b6470 dcf31e5 N/A 15028 692 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161020_131708.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device. Modify your design to reduce resources, or choose a larger device. The Altera Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 79 warnings
Error: Peak virtual memory: 14972 megabytes
Error: Processing ended: Thu Oct 20 13:17:02 2016
Error: Elapsed time: 06:26:28
Error: Total CPU time (on all processors): 15:05:22

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-19 12:37:03 6:35:17 e9b6470 dcf31e5 F24285 110491 754 0 132.3/100.0 155.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161019_123703.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-18 14:23:56 8:22:34 e9b6470 dcf31e5 F2426D 110512 760 0 135.6/100.0 150.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161018_142356.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127650 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-17 12:10:09 6:08:31 e9b6470 dcf31e5 F24255 110491 754 0 131.2/100.0 154.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161017_121009.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127975 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-16 12:11:50 6:10:17 e9b6470 dcf31e5 F2423D 110491 754 0 133.3/100.0 156.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161016_121150.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-15 12:31:38 6:30:00 e9b6470 dcf31e5 F24225 110494 754 0 134.1/100.0 142.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161015_123138.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 126968 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-14 13:24:41 7:22:49 e9b6470 dcf31e5 F2420D 110494 754 0 138.6/100.0 148.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161014_132441.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 127634 / 190240 0%
Total DSP Blocks 1864 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit dcf31e5da7e3e37dc587cfce9465b7d37cb27638
Merge: 810d361 2f8f371
Author: FTK User
Date: Thu Oct 13 12:01:04 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 2f8f3716e147227e7ead455840c6e21fef9027ab
Author: unknown
Date: Thu Oct 13 14:20:14 2016 +0200

fix sensitivity list in aux_logic_fifo
2016-10-13 12:40:29 6:38:50 e9b6470 810d361 F241F5 110493 754 0 136.1/100.0 153.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161013_124029.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-12 19:04:41 13:01:43 e9b6470 810d361 F241DD 110509 754 0 128.7/100.0 132.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161012_190441.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-12 00:30:06 2:27:14 e9b6470 810d361 F240BF 110599 755 0 128.3/100.0 65.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161012_003006.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-09 12:56:55 6:55:16 e9b6470 810d361 F24195 110491 754 0 130.1/100.0 149.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161009_125655.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-08 12:52:27 6:50:44 e9b6470 810d361 F2417D 110491 754 0 128.3/100.0 151.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161008_125227.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-07 12:59:51 6:58:16 e9b6470 810d361 F24165 110494 754 0 130.6/100.0 151.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161007_125951.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-06 14:10:43 8:09:07 e9b6470 810d361 F2414D 110494 754 0 126.5/100.0 144.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161006_141043.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-05 13:22:49 7:21:09 e9b6470 810d361 F24135 110494 754 0 140.7/100.0 152.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161005_132249.tar.bz2 .


Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 810d36156d52ce391f141bfad910a0efbf717a0f
Merge: 6a7b6d1 e521dad
Author: FTK User
Date: Tue Oct 4 12:00:50 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-04 06:01:25 0:00:06 e9b6470 6a7b6d1 N/A 48 1 1 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161004_060125.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 6a7b6d1209a2e29360b88f18f967731b55a92335
Merge: 7b8defc c1719ef
Author: FTK User
Date: Tue Oct 4 06:00:45 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit c1719ef8a05a0aa840fba8845acab161d8931834
Author: unknown
Date: Tue Oct 4 12:26:29 2016 +0200

format frequency in hex
2016-10-03 09:26:21 FAILED
2016-10-03 06:01:13 0:00:06 e9b6470 7b8defc N/A 48 1 1 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161003_060113.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-10-02 06:01:14 0:00:06 e9b6470 7b8defc N/A 48 1 1 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20161002_060114.tar.bz2 .

Analysis Errors

Error (292027): Specified license does not contain information required to run the Quartus Prime software.

Firmware Git Logs

commit e9b6470ddfb54f2f5087cc57879cefcaf7013232
Author: unknown
Date: Fri Sep 30 18:20:49 2016 +0200

propagate clock frequency info to period counter

commit 8924dded97580d72b67e29c1cb18d080abfd7ff4
Author: unknown
Date: Thu Sep 29 14:19:57 2016 +0200

adding clock frequency to register

AUXCommon Git Logs

commit 7b8defc34aab656d26313691eb14950f118d020c
Merge: d0087a0 20a810e
Author: FTK User
Date: Thu Sep 29 12:02:02 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon

commit d0087a0467017fd697e86a33bd7312e4493c0570
Merge: e61013c f810c3b
Author: FTK User
Date: Thu Sep 29 06:00:40 2016 -0700

Merge branch 'master' of eshop1.uchicago.edu:/net/designs/FTK/AUXCommon
2016-09-28 13:10:45 7:08:27 d851494 905000b F2408D 108836 734 0 123.7/100.0 156.0/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160928_131045.tar.bz2 .


Firmware Git Logs

commit d8514948112a496eff1f3e2e20e5d5665df4ea90
Author: unknown
Date: Mon Sep 19 14:06:04 2016 +0200

quartus 16

commit 72246180422a752dbbae8524c9568332b6afbc10
Merge: e6f698e b818169
Author: unknown
Date: Mon Sep 19 14:05:01 2016 +0200

Merge remote-tracking branch 'origin/master' into workingDCbits

AUXCommon Git Logs

commit 905000b0c77dc56a86eebb04e0a7441870b78e3a
Author: FTK User
Date: Tue Sep 27 13:42:01 2016 -0700

chmod +x nightly.sh

commit 6946a33a6db423a64fac4948ebccb6350bc50c94
Author: FTK User
Date: Tue Sep 27 13:41:03 2016 -0700

chmod +x compile.sh
2016-08-15 12:50:07 6:48:35 f873fc1 4b63cf8 F23C6D 108839 736 0 119.5/100.0 151.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160815_125007.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-14 14:36:34 8:34:57 f873fc1 4b63cf8 F23C55 108845 736 0 114.1/100.0 147.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160814_143634.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-13 12:50:05 6:48:17 f873fc1 4b63cf8 F23C3D 108839 736 0 126.6/100.0 152.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160813_125005.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-11 13:30:44 7:29:48 f873fc1 4b63cf8 N/A 14154 675 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160811_133044.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14307 megabytes
Error: Processing ended: Thu Aug 11 21:30:38 2016
Error: Elapsed time: 06:39:04
Error: Total CPU time (on all processors): 15:01:04

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-10 12:21:14 6:20:19 f873fc1 4b63cf8 N/A 14146 675 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160810_122114.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14274 megabytes
Error: Processing ended: Wed Aug 10 20:21:07 2016
Error: Elapsed time: 05:29:49
Error: Total CPU time (on all processors): 09:23:00

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-09 18:23:12 12:20:59 f873fc1 4b63cf8 F23BDD 108855 736 0 126.7/100.0 133.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160809_182312.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 130290 / 190240 0%
Total DSP Blocks 1940 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-08 13:47:09 7:45:33 f873fc1 4b63cf8 N/A 14154 675 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160808_134709.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14238 megabytes
Error: Processing ended: Mon Aug 08 21:47:02 2016
Error: Elapsed time: 06:47:56
Error: Total CPU time (on all processors): 15:26:53

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-07 12:24:09 6:21:54 f873fc1 4b63cf8 F23BAD 108836 736 0 131.8/100.0 156.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160807_122409.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129967 / 190240 0%
Total DSP Blocks 1940 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-06 18:57:12 12:56:18 f873fc1 4b63cf8 N/A 14156 675 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160806_185712.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14308 megabytes
Error: Processing ended: Sun Aug 07 02:57:05 2016
Error: Elapsed time: 12:01:56
Error: Total CPU time (on all processors): 1:07:09:28

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-05 20:50:55 14:48:58 f873fc1 4b63cf8 F23B7D 108841 736 0 131.1/100.0 150.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160805_205055.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-04 22:07:59 16:06:10 f873fc1 4b63cf8 F23B65 108837 736 0 125.6/100.0 155.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160804_220759.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-03 17:01:59 11:00:13 f873fc1 4b63cf8 F23B4D 108848 736 0 112.8/100.0 145.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160803_170159.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129635 / 190240 0%
Total DSP Blocks 1940 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-02 12:20:11 6:18:16 f873fc1 4b63cf8 F23B35 108836 736 0 125.7/100.0 146.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160802_122011.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-08-01 12:14:29 6:12:14 f873fc1 4b63cf8 F23B1D 108836 736 0 131.5/100.0 152.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160801_121429.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-31 13:54:16 7:52:50 f873fc1 4b63cf8 N/A 14155 675 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160731_135416.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14247 megabytes
Error: Processing ended: Sun Jul 31 21:54:10 2016
Error: Elapsed time: 07:02:34
Error: Total CPU time (on all processors): 17:49:08

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-30 12:33:30 6:31:47 f873fc1 4b63cf8 F23AED 108836 736 0 125.8/100.0 155.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160730_123330.tar.bz2 .


Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-29 13:26:01 7:25:01 f873fc1 4b63cf8 N/A 14154 675 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160729_132601.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 76 warnings
Error: Peak virtual memory: 14286 megabytes
Error: Processing ended: Fri Jul 29 21:25:54 2016
Error: Elapsed time: 06:34:10
Error: Total CPU time (on all processors): 15:15:04

Firmware Git Logs

commit f873fc11bd9393f6d43f15126bdd4687988424c9
Merge: 80e6e88 f67cfaf
Author: Rui Zou
Date: Thu Jul 28 09:54:01 2016 -0500

Merge branch 'new_combiner'

commit f67cfaf1c8559f3640b63488b94a04e50f0cabd6
Author: unknown
Date: Fri Jul 22 16:57:02 2016 -0500

Deleting the old combiner in FItterBlock. Was able to compile at 150 and pass bit-level for partial and full tvs.

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-28 13:29:27 7:28:04 80e6e88 4b63cf8 N/A 14056 668 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160728_132927.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 74 warnings
Error: Peak virtual memory: 14191 megabytes
Error: Processing ended: Thu Jul 28 21:29:19 2016
Error: Elapsed time: 06:35:01
Error: Total CPU time (on all processors): 15:18:40

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-27 13:45:30 7:44:31 80e6e88 4b63cf8 N/A 14056 668 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160727_134530.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 74 warnings
Error: Peak virtual memory: 14145 megabytes
Error: Processing ended: Wed Jul 27 21:45:24 2016
Error: Elapsed time: 06:53:15
Error: Total CPU time (on all processors): 16:23:13

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-26 11:29:32 5:27:13 80e6e88 4b63cf8 F23A8D 108735 729 0 134.2/100.0 153.2/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160726_112932.tar.bz2 .


Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-25 11:39:04 5:36:52 80e6e88 4b63cf8 F23A75 108738 729 0 123.6/100.0 150.4/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160725_113904.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129387 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-24 11:31:38 5:29:37 80e6e88 4b63cf8 F23A5D 108738 729 0 134.6/100.0 151.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160724_113138.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129578 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-23 11:31:31 5:29:53 80e6e88 4b63cf8 F23A45 108738 729 0 127.8/100.0 154.5/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160723_113131.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129826 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit 80e6e88442e6a1b0ea7b20b99387cc64ebebe545
Author: Rui Zou
Date: Fri Jul 22 16:54:35 2016 -0500

Revert "Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented"

This reverts commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec.

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-22 12:32:31 6:30:14 fe86e7f 4b63cf8 F23A2D 108798 729 0 133.3/100.0 155.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160722_123231.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-21 13:10:50 7:08:24 fe86e7f 4b63cf8 F23A15 108798 729 0 129.4/100.0 152.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160721_131050.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129673 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-20 21:23:17 2:25:38 fe86e7f 4b63cf8 F2315E 108898 729 0 108.9/100.0 77.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160720_212317.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-18 12:39:39 6:37:29 fe86e7f 4b63cf8 F239CD 108798 729 0 130.6/100.0 144.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160718_123939.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-17 11:37:31 5:35:56 fe86e7f 4b63cf8 N/A 14110 668 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160717_113731.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 74 warnings
Error: Peak virtual memory: 14200 megabytes
Error: Processing ended: Sun Jul 17 19:37:25 2016
Error: Elapsed time: 04:47:46
Error: Total CPU time (on all processors): 09:02:31

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-16 12:08:09 6:05:51 fe86e7f 4b63cf8 F2399D 108796 729 0 131.8/100.0 155.7/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160716_120809.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-14 13:47:58 7:46:37 fe86e7f 4b63cf8 N/A 14106 668 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160714_134758.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 74 warnings
Error: Peak virtual memory: 14242 megabytes
Error: Processing ended: Thu Jul 14 21:47:50 2016
Error: Elapsed time: 06:38:43
Error: Total CPU time (on all processors): 10:32:47

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-13 13:31:46 7:29:17 fe86e7f 4b63cf8 F23955 108796 729 0 129.2/100.0 152.3/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160713_133146.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-12 14:29:56 8:27:11 fe86e7f 4b63cf8 F2393D 108799 729 0 123.9/100.0 147.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160712_142956.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129569 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-11 14:03:38 8:01:56 fe86e7f 4b63cf8 N/A 14106 668 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160711_140338.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 74 warnings
Error: Peak virtual memory: 14212 megabytes
Error: Processing ended: Mon Jul 11 22:03:30 2016
Error: Elapsed time: 06:49:31
Error: Total CPU time (on all processors): 10:53:58

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-10 14:52:54 8:50:13 fe86e7f 4b63cf8 F2390D 108799 729 0 123.0/100.0 144.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160710_145254.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129835 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-09 13:25:29 7:22:56 fe86e7f 4b63cf8 F238F5 108796 729 0 129.3/100.0 143.9/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160709_132529.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-08 14:01:26 8:00:09 fe86e7f 4b63cf8 N/A 14106 668 7 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160708_140126.tar.bz2 .

Fitter Errors

Error (170143): Final fitting attempt was unsuccessful
Error (11802): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 74 warnings
Error: Peak virtual memory: 14191 megabytes
Error: Processing ended: Fri Jul 08 22:01:17 2016
Error: Elapsed time: 06:52:08
Error: Total CPU time (on all processors): 10:58:45

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-07 18:16:20 12:13:53 fe86e7f 4b63cf8 F238C5 108811 729 0 132.7/100.0 136.8/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160707_181620.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-07-06 16:50:10 2:30:32 N/A N/A F2315E 108803 729 0 128.5/100.0 149.6/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160706_165010.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 129467 / 190240 0%
Total DSP Blocks 1934 / 2414 0%
Horizontal periphery clocks and Vertical periphery clocks 599 / 1156 0%

Firmware Git Logs

AUXCommon Git Logs
2016-07-06 10:27:24 FAILED
2016-06-30 21:25:03 0:49:38 fe86e7f 4b63cf8 N/A 13985 664 0 - - Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160630_212503.tar.bz2 .

Fitter Resource Usage Summary

Logic utilization (ALMs needed / total ALMs on device) 0 / 0 -
Total DSP Blocks 0 / 0 -
Horizontal periphery clocks and Vertical periphery clocks 0 / 0 -

Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 4b63cf804e0eca6f95733a7d683eb826905a3fdd
Merge: f0beace 04f33a4
Author: unknown
Date: Tue Jun 28 16:32:14 2016 +0200

Merge remote-tracking branch 'origin/master'

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort
2016-06-30 01:36:50 2:28:42 fe86e7f 04f33a4 F2315E 108910 729 0 134.1/100.0 49.1/150.0 Rx1
Get files:
  scp eshop1.uchicago.edu:/net/designs/FTK/Nightlies/compile_Processor_Rx_EMIF_20160630_013650.tar.bz2 .


Firmware Git Logs

commit fe86e7f0fa3c4dda08b690d28d4741ec6ad6c0ec
Author: unknown
Date: Thu Jun 23 19:10:16 2016 -0500

Increasing input fifo depth for DOSpyBuffer in response to a bigger latency on the input with HitSort implemented

commit beb6d9aa3d6dfc642787516d29623ca01858837d
Author: unknown
Date: Mon Jun 20 16:35:28 2016 -0500

Adding includeHS option in Full Testbench

AUXCommon Git Logs

commit 04f33a4e600b0ce49bef514dd32230086ef9487c
Author: Rui Zou
Date: Mon Jun 27 09:33:22 2016 -0500

Updating ssmap testbench to include HitSort

commit 0b986ef92f07a4458cb90f9d3015f682f87a4dba
Author: Rui Zou
Date: Thu Jun 23 02:17:24 2016 -0500

adding reset in hitsort_mux.vhd